On Mon, Mar 21, 2016 at 04:26:58PM -0300, Paulo Zanoni wrote:
> Now that we're more protected against user space doing frontbuffer
> mmap rendering, the last - how many times did I say this before? -
> SKL problem seems to be solved. So let's give it a try.
>
> If you reached this commit through git bisect or if you just want more
> information about FBC, please see:
> commit a98ee79317b4091cafb502b4ffdbbbe1335e298c
> Author: Paulo Zanoni <paulo.r.zan...@intel.com>
> Date: Tue Feb 16 18:47:21 2016 -0200
> drm/i915/fbc: enable FBC by default on HSW and BDW
>
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_fbc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c
> b/drivers/gpu/drm/i915/intel_fbc.c
> index 718ac38..67f8810 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -1270,7 +1270,8 @@ void intel_fbc_init(struct drm_i915_private *dev_priv)
> * know what's going on. */
> if (i915.enable_fbc < 0) {
> i915.enable_fbc = IS_HASWELL(dev_priv) ||
> - IS_BROADWELL(dev_priv);
> + IS_BROADWELL(dev_priv) ||
> + IS_SKYLAKE(dev_priv);
Can we just future-proof this and enable on everything gen8+ where we have
fbc? Apparently bsw/bxt simply lack this ...
-Daniel
> DRM_DEBUG_KMS("Sanitized enable_fbc value: %d\n",
> i915.enable_fbc);
> }
> --
> 2.7.0
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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