For flexible GEM context creation, we factor out __i915_gem_create_context
as the core logic of creation a GEM context. After the refactor, it more
likes a context creation service, which is able to create context by
explicit requirement of upper level components.
For the assumptions in original implementation, we keep them in the upper
level wrapper: i915_gem_create_context().
alloc_context_idr() is another function factored out to setup a IDR for
ordinary GEM context. Some context, e.g. GVT context, will not be
manipulated by user space application, so it doesn't need an IDR.
Signed-off-by: Zhi Wang <zhi.a.w...@intel.com>
---
drivers/gpu/drm/i915/i915_gem_context.c | 62 ++++++++++++++++++++++++---------
1 file changed, 45 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 4be2ce9..38e9fe1 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -235,17 +235,7 @@ __create_hw_context(struct drm_device *dev,
ctx->legacy_hw_ctx.rcs_state = obj;
}
- /* Default context will never have a file_priv */
- if (file_priv != NULL) {
- ret = idr_alloc(&file_priv->context_idr, ctx,
- DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
- if (ret < 0)
- goto err_out;
- } else
- ret = DEFAULT_CONTEXT_HANDLE;
-
ctx->file_priv = file_priv;
- ctx->user_handle = ret;
/* NB: Mark all slices as needing a remap so that when the context first
* loads it will restore whatever remap state already exists. If there
* is no remap info, it will be a NOP. */
@@ -260,13 +250,8 @@ err_out:
return ERR_PTR(ret);
}
-/**
- * The default context needs to exist per ring that uses contexts. It stores
the
- * context state of the GPU for applications that don't utilize HW contexts, as
- * well as an idle case.
- */
static struct intel_context *
-i915_gem_create_context(struct drm_device *dev,
+__i915_gem_create_context(struct drm_device *dev,
struct drm_i915_file_private *file_priv)
{
const bool is_global_default_ctx = file_priv == NULL;
@@ -316,11 +301,54 @@ err_unpin:
if (is_global_default_ctx && ctx->legacy_hw_ctx.rcs_state)
i915_gem_object_ggtt_unpin(ctx->legacy_hw_ctx.rcs_state);
err_destroy:
- idr_remove(&file_priv->context_idr, ctx->user_handle);
i915_gem_context_unreference(ctx);
return ERR_PTR(ret);
}
+static inline int alloc_context_idr(struct drm_device *dev,
+ struct intel_context *ctx)
+{
+ int ret;
+
+ /* Default context will never have a file_priv */
+ if (ctx->file_priv != NULL) {
+ ret = idr_alloc(&ctx->file_priv->context_idr, ctx,
+ DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+ } else {
+ ret = DEFAULT_CONTEXT_HANDLE;
+ }
+
+ ctx->user_handle = ret;
+ return 0;
+}
+
+/**
+ * The default context needs to exist per ring that uses contexts. It stores
the
+ * context state of the GPU for applications that don't utilize HW contexts, as
+ * well as an idle case.
+ */
+static struct intel_context *
+i915_gem_create_context(struct drm_device *dev,
+ struct drm_i915_file_private *file_priv)
+{
+ struct intel_context *ctx;
+ int ret;
+
+ ctx = __i915_gem_create_context(dev, file_priv);
+ if (IS_ERR(ctx))
+ return ctx;
+
+ ret = alloc_context_idr(dev, ctx);
+ if (ret < 0) {
+ i915_gem_context_unreference(ctx);
+ return ERR_PTR(ret);
+ }
+
+ return ctx;
+}
+
static void i915_gem_context_unpin(struct intel_context *ctx,
struct intel_engine_cs *engine)
{
--
1.9.1
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