Get/Put RPM ref around RP_CONTROL write and outside mutex lock.
On 2/18/2016 2:56 PM, ankitprasad.r.sha...@intel.com wrote:
From: Ankitprasad Sharma <ankitprasad.r.sha...@intel.com> This patch exposes a new debugfs interface 'i915_rps_disable' Following 2 values shall be echoed into this file. '0' - RPS explicitly enabled . '1' - RPS explicitly disabled. This interface provides capabilty to enable/disable Turbo feature at runtime, which is needed for its validation. Signed-off-by: Deepak S <deepa...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sha...@intel.com> --- drivers/gpu/drm/i915/i915_debugfs.c | 55 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 2 ++ 2 files changed, 57 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index aa7c7a3..1f58540 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -5023,6 +5023,60 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops, i915_min_freq_get, i915_min_freq_set, "%llu\n");+static int i915_rps_disable_get(void *data, u64 *val)+{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = dev->dev_private; + + if(INTEL_INFO(dev)->gen < 6) + return -ENODEV; + + flush_delayed_work(&dev_priv->rps.delayed_resume_work); + + *val = dev_priv->rps.rps_disable; + + return 0; +} + +static int i915_rps_disable_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = dev->dev_private; + int ret; + + flush_delayed_work(&dev_priv->rps.delayed_resume_work); + + if(INTEL_INFO(dev)->gen < 6) + return -ENODEV; + + DRM_DEBUG_DRIVER("Setting RPS disable %s\n", + val ? "true" : "false"); + + ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock); + if (ret) + return ret; + + dev_priv->rps.rps_disable = val; + + if (val) + I915_WRITE(GEN6_RP_CONTROL, 0); + else + I915_WRITE(GEN6_RP_CONTROL, GEN6_RP_MEDIA_TURBO | + GEN6_RP_MEDIA_HW_NORMAL_MODE | + GEN6_RP_MEDIA_IS_GFX | + GEN6_RP_ENABLE | + GEN6_RP_UP_BUSY_AVG | + GEN6_RP_DOWN_IDLE_AVG); + + mutex_unlock(&dev_priv->rps.hw_lock); + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_rps_disable_fops, + i915_rps_disable_get, i915_rps_disable_set, + "%llu\n"); + static int i915_cache_sharing_get(void *data, u64 *val) { @@ -5391,6 +5445,7 @@ static const struct i915_debugfs_files { {"i915_wedged", &i915_wedged_fops}, {"i915_max_freq", &i915_max_freq_fops}, {"i915_min_freq", &i915_min_freq_fops}, + {"i915_rps_disable", &i915_rps_disable_fops}, {"i915_cache_sharing", &i915_cache_sharing_fops}, {"i915_ring_stop", &i915_ring_stop_fops}, {"i915_ring_missed_irq", &i915_ring_missed_irq_fops}, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9d67097..28e3537 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1169,6 +1169,8 @@ struct intel_gen6_power_mgmt { u8 up_threshold; /* Current %busy required to uplock */ u8 down_threshold; /* Current %busy required to downclock */+ bool rps_disable;+ int last_adj; enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
_______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
