On Fri, Jan 22, 2016 at 12:42:47PM +0000, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > > Since: > > commit 82352e908acd36d7244c75a008c9f27a2ced44d5 > Author: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Date: Fri Jan 15 17:12:45 2016 +0000 > > drm/i915: Cache LRC state page in the context > > and: > > commit 0eb973d31d0aadb6bc801fd6d796afecbbfc3d5b > Author: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Date: Fri Jan 15 15:10:28 2016 +0000 > > drm/i915: Cache ringbuffer GTT VMA > > We can also remove the ring buffer start updates on every > context update since the address will not change for the > duration of the LRC pin. > > For GuC we can remove the update altogether because it > only cares about the ring buffer start. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Cc: Alex Dai <yu....@intel.com> > Cc: Dave Gordon <david.s.gor...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Finally starting to reduce my delta at last :-p Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
