On Thu, Jan 14, 2016 at 11:46:40AM +0530, ankitprasad.r.sha...@intel.com wrote:
> From: Ankitprasad Sharma <ankitprasad.r.sha...@intel.com>
> 
> This patch adds support for clearing buffer objects via CPU/GTT. This
> is particularly useful for clearing out the non shmem backed objects.
> Currently intend to use this only for buffers allocated from stolen
> region.
> 
> v2: Added kernel doc for i915_gem_clear_object(), corrected/removed
> variable assignments (Tvrtko)
> 
> v3: Map object page by page to the gtt if the pinning of the whole object
> to the ggtt fails, Corrected function name (Chris)
> 
> v4: Clear the buffer page by page, and not map the whole object in the gtt
> aperture. Use i915 wrapper function in place of drm_mm_insert_node_in_range.
> 
> v5: Use renamed wrapper function for drm_mm_insert_node_in_range,
> updated barrier positioning (Chris)
> 
> v6: Use PAGE_SIZE instead of 4096, use get_pages call before pinning pages
> (Tvrtko)
> 
> Testcase: igt/gem_stolen
> 
> Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sha...@intel.com>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h |  1 +
>  drivers/gpu/drm/i915/i915_gem.c | 49 
> +++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7dc122f..1153150 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2893,6 +2893,7 @@ int i915_gem_obj_prepare_shmem_read(struct 
> drm_i915_gem_object *obj,
>                                   int *needs_clflush);
>  
>  int __must_check i915_gem_object_get_pages(struct drm_i915_gem_object *obj);
> +int i915_gem_object_clear(struct drm_i915_gem_object *obj);
>  
>  static inline int __sg_page_count(struct scatterlist *sg)
>  {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4ef74cf..a2138c0 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5359,3 +5359,52 @@ fail:
>       drm_gem_object_unreference(&obj->base);
>       return ERR_PTR(ret);
>  }
> +
> +/**
> + * i915_gem_object_clear() - Clear buffer object via CPU/GTT
> + * @obj: Buffer object to be cleared
> + *
> + * Return: 0 - success, non-zero - failure
> + */
> +int i915_gem_object_clear(struct drm_i915_gem_object *obj)
> +{
> +     int ret, i;
> +     char __iomem *base;
> +     size_t size = obj->base.size;
> +     struct drm_i915_private *i915 = to_i915(obj->base.dev);
> +     struct drm_mm_node node;
> +
> +     lockdep_assert_held(&obj->base.dev->struct_mutex);
> +     memset(&node, 0, sizeof(node));

We are repeating this? I think every caller has to clear the node before
inserting it (part of the requirement of the drm_mm_insert_node), so we
can move it to insert_mappable_node().

> +     ret = insert_mappable_node(i915, &node, PAGE_SIZE);
> +     if (ret)
                return ret;

> +
> +     ret = i915_gem_object_get_pages(obj);
> +     if (ret) {
                goto err_remove_node;

> +     }
> +
> +     i915_gem_object_pin_pages(obj);
> +     base = io_mapping_map_wc(i915->gtt.mappable, node.start);
> +     for (i = 0; i < size/PAGE_SIZE; i++) {
> +             i915->gtt.base.insert_page(&i915->gtt.base,
> +                                        i915_gem_object_get_dma_address(obj, 
> i),
> +                                        node.start,
> +                                        I915_CACHE_NONE, 0);
> +             wmb();
> +             memset_io(base, 0, PAGE_SIZE);
> +             wmb();
> +     }
> +
> +     io_mapping_unmap(base);
> +     i915->gtt.base.clear_range(&i915->gtt.base,
> +                     node.start, node.size,
> +                     true);
> +     remove_mappable_node(&node);
> +     i915_gem_object_unpin_pages(obj);
> +     i915_gem_object_put_pages(obj);

Again don't put pages...

> +out:

Fix the onion.
i.e. undo the operation in reverse order;

        put_pages(obj);
err_remove_node:
        remove_mappable_node(&node);
> +     return ret;
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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