Perform s/ringbuf/ring/ on the context struct for consistency with the
ring/engine split.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 6 +--
drivers/gpu/drm/i915/intel_lrc.c | 63 ++++++++++++++----------------
4 files changed, 35 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 018076c89247..6e91726db8d3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1988,7 +1988,7 @@ static int i915_context_status(struct seq_file *m, void
*unused)
struct drm_i915_gem_object *ctx_obj =
ctx->engine[i].state;
struct intel_ringbuffer *ringbuf =
- ctx->engine[i].ringbuf;
+ ctx->engine[i].ring;
seq_printf(m, "%s: ", ring->name);
if (ctx_obj)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index baede4517c70..9f06dd19bfb2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -885,7 +885,7 @@ struct intel_context {
/* Execlists */
struct {
struct drm_i915_gem_object *state;
- struct intel_ringbuffer *ringbuf;
+ struct intel_ringbuffer *ring;
int pin_count;
} engine[I915_NUM_RINGS];
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 53abe2143f8a..b47e630e048a 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -390,7 +390,7 @@ static void guc_init_ctx_desc(struct intel_guc *guc,
for (i = 0; i < I915_NUM_RINGS; i++) {
struct guc_execlist_context *lrc = &desc.lrc[i];
- struct intel_ringbuffer *ringbuf = ctx->engine[i].ringbuf;
+ struct intel_ringbuffer *ring = ctx->engine[i].ring;
struct intel_engine_cs *engine;
struct drm_i915_gem_object *obj;
uint64_t ctx_desc;
@@ -406,7 +406,7 @@ static void guc_init_ctx_desc(struct intel_guc *guc,
if (!obj)
break; /* XXX: continue? */
- engine = ringbuf->engine;
+ engine = ring->engine;
ctx_desc = intel_lr_context_descriptor(ctx, engine);
lrc->context_desc = (u32)ctx_desc;
@@ -416,7 +416,7 @@ static void guc_init_ctx_desc(struct intel_guc *guc,
lrc->context_id = (client->ctx_index << GUC_ELC_CTXID_OFFSET) |
(engine->id << GUC_ELC_ENGINE_OFFSET);
- obj = ringbuf->obj;
+ obj = ring->obj;
lrc->ring_begin = i915_gem_obj_ggtt_offset(obj);
lrc->ring_end = lrc->ring_begin + obj->base.size - 1;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8639ebfab96f..65beb7267d1a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -402,24 +402,24 @@ static void execlists_submit_requests(struct
drm_i915_gem_request *rq0,
execlists_elsp_write(rq0, rq1);
}
-static void execlists_context_unqueue(struct intel_engine_cs *ring)
+static void execlists_context_unqueue(struct intel_engine_cs *engine)
{
struct drm_i915_gem_request *req0 = NULL, *req1 = NULL;
struct drm_i915_gem_request *cursor = NULL, *tmp = NULL;
- assert_spin_locked(&ring->execlist_lock);
+ assert_spin_locked(&engine->execlist_lock);
/*
* If irqs are not active generate a warning as batches that finish
* without the irqs may get lost and a GPU Hang may occur.
*/
- WARN_ON(!intel_irqs_enabled(ring->dev->dev_private));
+ WARN_ON(!intel_irqs_enabled(engine->dev->dev_private));
- if (list_empty(&ring->execlist_queue))
+ if (list_empty(&engine->execlist_queue))
return;
/* Try to read in pairs */
- list_for_each_entry_safe(cursor, tmp, &ring->execlist_queue,
+ list_for_each_entry_safe(cursor, tmp, &engine->execlist_queue,
execlist_link) {
if (!req0) {
req0 = cursor;
@@ -429,7 +429,7 @@ static void execlists_context_unqueue(struct
intel_engine_cs *ring)
cursor->elsp_submitted = req0->elsp_submitted;
list_del(&req0->execlist_link);
list_add_tail(&req0->execlist_link,
- &ring->execlist_retired_req_list);
+ &engine->execlist_retired_req_list);
req0 = cursor;
} else {
req1 = cursor;
@@ -437,7 +437,7 @@ static void execlists_context_unqueue(struct
intel_engine_cs *ring)
}
}
- if (IS_GEN8(ring->dev) || IS_GEN9(ring->dev)) {
+ if (IS_GEN8(engine->dev) || IS_GEN9(engine->dev)) {
/*
* WaIdleLiteRestore: make sure we never cause a lite
* restore with HEAD==TAIL
@@ -449,11 +449,11 @@ static void execlists_context_unqueue(struct
intel_engine_cs *ring)
* for where we prepare the padding after the end of the
* request.
*/
- struct intel_ringbuffer *ringbuf;
+ struct intel_ringbuffer *ring;
- ringbuf = req0->ctx->engine[ring->id].ringbuf;
+ ring = req0->ctx->engine[engine->id].ring;
req0->tail += 8;
- req0->tail &= ringbuf->size - 1;
+ req0->tail &= ring->size - 1;
}
}
@@ -671,7 +671,7 @@ int intel_logical_ring_alloc_request_extras(struct
drm_i915_gem_request *request
{
int ret;
- request->ring = request->ctx->engine[request->engine->id].ringbuf;
+ request->ring = request->ctx->engine[request->engine->id].ring;
if (request->ctx != request->engine->default_context) {
ret = intel_lr_context_pin(request);
@@ -1775,7 +1775,7 @@ static int logical_ring_init(struct drm_device *dev,
struct intel_engine_cs *rin
ret = intel_lr_context_do_pin(
ring,
ring->default_context->engine[ring->id].state,
- ring->default_context->engine[ring->id].ringbuf);
+ ring->default_context->engine[ring->id].ring);
if (ret) {
DRM_ERROR(
"Failed to pin and map ringbuffer %s: %d\n",
@@ -2177,16 +2177,15 @@ void intel_lr_context_free(struct intel_context *ctx)
struct drm_i915_gem_object *ctx_obj = ctx->engine[i].state;
if (ctx_obj) {
- struct intel_ringbuffer *ringbuf =
- ctx->engine[i].ringbuf;
- struct intel_engine_cs *engine = ringbuf->engine;
+ struct intel_ringbuffer *ring = ctx->engine[i].ring;
+ struct intel_engine_cs *engine = ring->engine;
if (ctx == engine->default_context) {
- intel_unpin_ringbuffer_obj(ringbuf);
+ intel_unpin_ringbuffer_obj(ring);
i915_gem_object_ggtt_unpin(ctx_obj);
}
WARN_ON(ctx->engine[engine->id].pin_count);
- intel_ringbuffer_free(ringbuf);
+ intel_ringbuffer_free(ring);
drm_gem_object_unreference(&ctx_obj->base);
}
}
@@ -2266,7 +2265,7 @@ int intel_lr_context_deferred_alloc(struct intel_context
*ctx,
{
struct drm_i915_gem_object *ctx_obj;
uint32_t context_size;
- struct intel_ringbuffer *ringbuf;
+ struct intel_ringbuffer *ring;
int ret;
WARN_ON(ctx->legacy_hw_ctx.rcs_state != NULL);
@@ -2283,19 +2282,19 @@ int intel_lr_context_deferred_alloc(struct
intel_context *ctx,
return -ENOMEM;
}
- ringbuf = intel_engine_create_ringbuffer(engine, 4 * PAGE_SIZE);
- if (IS_ERR(ringbuf)) {
- ret = PTR_ERR(ringbuf);
+ ring = intel_engine_create_ringbuffer(engine, 4 * PAGE_SIZE);
+ if (IS_ERR(ring)) {
+ ret = PTR_ERR(ring);
goto error_deref_obj;
}
- ret = populate_lr_context(ctx, ctx_obj, engine, ringbuf);
+ ret = populate_lr_context(ctx, ctx_obj, engine, ring);
if (ret) {
DRM_DEBUG_DRIVER("Failed to populate LRC: %d\n", ret);
goto error_ringbuf;
}
- ctx->engine[engine->id].ringbuf = ringbuf;
+ ctx->engine[engine->id].ring = ring;
ctx->engine[engine->id].state = ctx_obj;
if (ctx != engine->default_context && engine->init_context) {
@@ -2320,10 +2319,10 @@ int intel_lr_context_deferred_alloc(struct
intel_context *ctx,
return 0;
error_ringbuf:
- intel_ringbuffer_free(ringbuf);
+ intel_ringbuffer_free(ring);
error_deref_obj:
drm_gem_object_unreference(&ctx_obj->base);
- ctx->engine[engine->id].ringbuf = NULL;
+ ctx->engine[engine->id].ring = NULL;
ctx->engine[engine->id].state = NULL;
return ret;
}
@@ -2332,14 +2331,12 @@ void intel_lr_context_reset(struct drm_device *dev,
struct intel_context *ctx)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- struct intel_engine_cs *ring;
+ struct intel_engine_cs *unused;
int i;
- for_each_ring(ring, dev_priv, i) {
- struct drm_i915_gem_object *ctx_obj =
- ctx->engine[ring->id].state;
- struct intel_ringbuffer *ringbuf =
- ctx->engine[ring->id].ringbuf;
+ for_each_ring(unused, dev_priv, i) {
+ struct drm_i915_gem_object *ctx_obj = ctx->engine[i].state;
+ struct intel_ringbuffer *ring = ctx->engine[i].ring;
uint32_t *reg_state;
struct page *page;
@@ -2358,7 +2355,7 @@ void intel_lr_context_reset(struct drm_device *dev,
kunmap_atomic(reg_state);
- ringbuf->head = 0;
- ringbuf->tail = 0;
+ ring->head = 0;
+ ring->tail = 0;
}
}
--
2.7.0.rc3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
