On Thu, 17 Dec 2015, Mika Kahola <mika.kah...@intel.com> wrote:
> On Mon, 2015-12-14 at 12:50 +0200, Jani Nikula wrote:
>> The RVDA and RVDS (raw VBT data address and size) fields of the ASLE
>> mailbox may specify an alternate location for VBT instead of mailbox #4.
>> Use the alternate location if available and valid, falling back to
>> mailbox #4 otherwise.
>>
> Tested-by: Mika Kahola <mika.kah...@intel.com>
>> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Pushed to drm-intel-next-queued, thanks for the review and testing.
BR,
Jani.
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/intel_opregion.c | 25 +++++++++++++++++++++++--
>> 2 files changed, 24 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index ca8c2a64bc6d..8cfac7398568 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -457,6 +457,7 @@ struct intel_opregion {
>> u32 swsci_gbda_sub_functions;
>> u32 swsci_sbcb_sub_functions;
>> struct opregion_asle *asle;
>> + void *rvda;
>> const void *vbt;
>> u32 vbt_size;
>> u32 *lid_state;
>> diff --git a/drivers/gpu/drm/i915/intel_opregion.c
>> b/drivers/gpu/drm/i915/intel_opregion.c
>> index e89ee2383fe1..a139889dd45b 100644
>> --- a/drivers/gpu/drm/i915/intel_opregion.c
>> +++ b/drivers/gpu/drm/i915/intel_opregion.c
>> @@ -837,6 +837,10 @@ void intel_opregion_fini(struct drm_device *dev)
>>
>> /* just clear all opregion memory pointers now */
>> memunmap(opregion->header);
>> + if (opregion->rvda) {
>> + memunmap(opregion->rvda);
>> + opregion->rvda = NULL;
>> + }
>> opregion->header = NULL;
>> opregion->acpi = NULL;
>> opregion->swsci = NULL;
>> @@ -987,12 +991,29 @@ int intel_opregion_setup(struct drm_device *dev)
>> DRM_DEBUG_DRIVER("ASLE extension supported\n");
>>
>> if (!dmi_check_system(intel_no_opregion_vbt)) {
>> - const void *vbt = base + OPREGION_VBT_OFFSET;
>> - u32 vbt_size = OPREGION_ASLE_EXT_OFFSET - OPREGION_VBT_OFFSET;
>> + const void *vbt = NULL;
>> + u32 vbt_size = 0;
>> +
>> + if (opregion->header->opregion_ver >= 2 && opregion->asle &&
>> + opregion->asle->rvda && opregion->asle->rvds) {
>> + opregion->rvda = memremap(opregion->asle->rvda,
>> + opregion->asle->rvds,
>> + MEMREMAP_WB);
>> + vbt = opregion->rvda;
>> + vbt_size = opregion->asle->rvds;
>> + }
>>
>> if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
>> opregion->vbt = vbt;
>> opregion->vbt_size = vbt_size;
>> + DRM_DEBUG_DRIVER("VBT from RVDA\n");
>> + } else {
>> + vbt = base + OPREGION_VBT_OFFSET;
>> + vbt_size = OPREGION_ASLE_EXT_OFFSET -
>> OPREGION_VBT_OFFSET;
>> + if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
>> + opregion->vbt = vbt;
>> + opregion->vbt_size = vbt_size;
>> + }
>> }
>> }
>>
>
>
--
Jani Nikula, Intel Open Source Technology Center
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