On Fri, Dec 04, 2015 at 07:47:38PM +0530, Deepak M wrote:
> The reference clock for BXT is 19.2 MHz not 19.5 MHz, updating the
> correct value here.
>
> Signed-off-by: Deepak M <m.dee...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8bd2699..009f474 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7676,7 +7676,7 @@ enum skl_disp_power_wells {
> #define BXT_DSI_PLL_RATIO_MAX 0x7D
> #define BXT_DSI_PLL_RATIO_MIN 0x22
> #define BXT_DSI_PLL_RATIO_MASK 0xFF
> -#define BXT_REF_CLOCK_KHZ 19500
> +#define BXT_REF_CLOCK_KHZ 19200
No idea why we have this define in i915_reg.h. We don't have such
defines for other platforms (also my fix CHV refclk to 19.2MHz patch
never got reviewed by anyone either. Interedted?)
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> #define BXT_DSI_PLL_ENABLE 0x46080
> #define BXT_DSI_PLL_DO_ENABLE (1 << 31)
> --
> 1.9.1
>
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--
Ville Syrjälä
Intel OTC
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