From: John Harrison <john.c.harri...@intel.com>
Added a facility for triggering the scheduler state dump via a debugfs
entry.
v2: New patch in series.
For: VIZ-1587
Signed-off-by: John Harrison <john.c.harri...@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 33 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_scheduler.c | 9 +++++----
drivers/gpu/drm/i915/i915_scheduler.h | 6 ++++++
3 files changed, 44 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 66a2202..1c1c4bd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1285,6 +1285,38 @@
DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_file_queue_max_fops,
i915_scheduler_file_queue_max_set,
"%llu\n");
+static int
+i915_scheduler_dump_flags_get(void *data, u64 *val)
+{
+ struct drm_device *dev = data;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct i915_scheduler *scheduler = dev_priv->scheduler;
+
+ *val = scheduler->dump_flags;
+
+ return 0;
+}
+
+static int
+i915_scheduler_dump_flags_set(void *data, u64 val)
+{
+ struct drm_device *dev = data;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct i915_scheduler *scheduler = dev_priv->scheduler;
+
+ scheduler->dump_flags = lower_32_bits(val) & i915_sf_dump_mask;
+
+ if (val & 1)
+ i915_scheduler_dump_all(dev, "DebugFS");
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_dump_flags_fops,
+ i915_scheduler_dump_flags_get,
+ i915_scheduler_dump_flags_set,
+ "0x%llx\n");
+
static int i915_frequency_info(struct seq_file *m, void *unused)
{
struct drm_info_node *node = m->private;
@@ -5703,6 +5735,7 @@ static const struct i915_debugfs_files {
{"i915_scheduler_priority_preempt",
&i915_scheduler_priority_preempt_fops},
{"i915_scheduler_min_flying", &i915_scheduler_min_flying_fops},
{"i915_scheduler_file_queue_max", &i915_scheduler_file_queue_max_fops},
+ {"i915_scheduler_dump_flags", &i915_scheduler_dump_flags_fops},
{"i915_display_crc_ctl", &i915_display_crc_ctl_fops},
{"i915_pri_wm_latency", &i915_pri_wm_latency_fops},
{"i915_spr_wm_latency", &i915_spr_wm_latency_fops},
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c
b/drivers/gpu/drm/i915/i915_scheduler.c
index 9035cdb..16d067e 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -195,6 +195,10 @@ int i915_scheduler_init(struct drm_device *dev)
scheduler->priority_level_preempt = 900;
scheduler->min_flying = 2;
scheduler->file_queue_max = 64;
+ scheduler->dump_flags = i915_sf_dump_force |
+ i915_sf_dump_details |
+ i915_sf_dump_seqno |
+ i915_sf_dump_dependencies;
dev_priv->scheduler = scheduler;
@@ -760,10 +764,7 @@ static int i915_scheduler_dump_all_locked(struct
drm_device *dev, const char *ms
int i, r, ret = 0;
for_each_ring(ring, dev_priv, i) {
- scheduler->flags[ring->id] |= i915_sf_dump_force |
- i915_sf_dump_details |
- i915_sf_dump_seqno |
- i915_sf_dump_dependencies;
+ scheduler->flags[ring->id] |= scheduler->dump_flags &
i915_sf_dump_mask;
r = i915_scheduler_dump_locked(ring, msg);
if (ret == 0)
ret = r;
diff --git a/drivers/gpu/drm/i915/i915_scheduler.h
b/drivers/gpu/drm/i915/i915_scheduler.h
index 6e0dfa9..5257f5c 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.h
+++ b/drivers/gpu/drm/i915/i915_scheduler.h
@@ -118,6 +118,7 @@ struct i915_scheduler {
int32_t priority_level_preempt;
uint32_t min_flying;
uint32_t file_queue_max;
+ uint32_t dump_flags;
/* Statistics: */
struct i915_scheduler_stats stats[I915_NUM_RINGS];
@@ -134,6 +135,11 @@ enum {
i915_sf_dump_details = (1 << 9),
i915_sf_dump_dependencies = (1 << 10),
i915_sf_dump_seqno = (1 << 11),
+
+ i915_sf_dump_mask = i915_sf_dump_force |
+ i915_sf_dump_details |
+ i915_sf_dump_dependencies |
+ i915_sf_dump_seqno,
};
const char *i915_scheduler_flag_str(uint32_t flags);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
