On Thu, Nov 05, 2015 at 10:50:09AM -0800, Rodrigo Vivi wrote:
> This interface allows an immediate enabling of PSR feature.
> What allow us to see immediately the PSR savings and will
> allow us to expose this through powertop interface.
Pardon? It's a connector property.
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_sysfs.c | 82
> +++++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 4 +-
> drivers/gpu/drm/i915/intel_psr.c | 19 +++++++--
> 3 files changed, 99 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
> b/drivers/gpu/drm/i915/i915_sysfs.c
> index 2d092c1..0f371c6 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -111,6 +111,81 @@ static struct attribute_group ips_attr_group = {
> .attrs = ips_attrs
> };
>
> +static ssize_t
> +psr_show(struct device *kdev, struct device_attribute *attr, char *buf)
> +{
> + struct drm_minor *dminor = dev_to_drm_minor(kdev);
> + struct drm_device *dev = dminor->dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + ssize_t ret;
> +
> + mutex_lock(&dev_priv->psr.lock);
> + ret = snprintf(buf, PAGE_SIZE, "%s\n", dev_priv->psr.enabled ?
> + "enabled" : "disabled");
> + mutex_unlock(&dev_priv->psr.lock);
Superfluous locking.
> +
> + return ret;
> +}
> +
> +
> +static ssize_t
> +psr_toggle(struct device *kdev, struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct drm_minor *dminor = dev_to_drm_minor(kdev);
> + struct drm_device *dev = dminor->dev;
> + struct intel_connector *connector;
> + struct intel_encoder *encoder;
> + struct intel_crtc *crtc = NULL;
> + u32 val;
> + ssize_t ret;
> +
> + ret = kstrtou32(buf, 0, &val);
> + if (ret)
> + return ret;
> +
> + for_each_intel_connector(dev, connector) {
> + if (!connector->base.encoder)
> + continue;
> + encoder = to_intel_encoder(connector->base.encoder);
> + crtc = to_intel_crtc(encoder->base.crtc);
> + }
"Let's pick a connector at random".
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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