From: Daniel Vetter <daniel.vet...@intel.com>
Two benefits:
- We can use FW_LOADER_USERSPACE_FALLBACK.
- We can use flush_work to synchronize with the oustanding worker,
which is a notch more obvious what it does than having a special
completion.
The next patch will properly synchronize against the async loader in
the resume and unload code.
Cc: Damien Lespiau <damien.lesp...@intel.com>
Cc: Imre Deak <imre.d...@intel.com>
Cc: Sunil Kamath <sunil.kam...@intel.com>
Signed-off-by: Daniel Vetter <daniel.vet...@intel.com>
Signed-off-by: Animesh Manna <animesh.ma...@intel.com>
Reviewed-by: Imre Deak <imre.d...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_csr.c | 27 +++++++++++++--------------
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9918b61..ffd6068 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -739,6 +739,7 @@ struct intel_uncore {
#define CSR_VERSION_MINOR(version) ((version) & 0xffff)
struct intel_csr {
+ struct work_struct work;
const char *fw_path;
uint32_t *dmc_payload;
uint32_t dmc_fw_size;
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index ce0c47f..148c137 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -364,11 +364,18 @@ static uint32_t *parse_csr_fw(struct drm_i915_private
*dev_priv,
return dmc_payload;
}
-static void finish_csr_load(const struct firmware *fw, void *context)
+static void csr_load_work_fn(struct work_struct *work)
{
- struct drm_i915_private *dev_priv = context;
- struct intel_csr *csr = &dev_priv->csr;
+ struct drm_i915_private *dev_priv;
+ struct intel_csr *csr;
+ const struct firmware *fw;
+ int ret;
+ dev_priv = container_of(work, typeof(*dev_priv), csr.work);
+ csr = &dev_priv->csr;
+
+ ret = request_firmware(&fw, dev_priv->csr.fw_path,
+ &dev_priv->dev->pdev->dev);
if (!fw)
goto out;
@@ -376,7 +383,6 @@ static void finish_csr_load(const struct firmware *fw, void
*context)
if (!dev_priv->csr.dmc_payload)
goto out;
-
/* load csr program during system boot, as needed for DC states */
intel_csr_load_program(dev_priv);
@@ -405,7 +411,8 @@ out:
void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
{
struct intel_csr *csr = &dev_priv->csr;
- int ret;
+
+ INIT_WORK(&dev_priv->csr.work, csr_load_work_fn);
if (!HAS_CSR(dev_priv))
return;
@@ -427,15 +434,7 @@ void intel_csr_ucode_init(struct drm_i915_private
*dev_priv)
*/
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
- /* CSR supported for platform, load firmware */
- ret = request_firmware_nowait(THIS_MODULE, true, csr->fw_path,
- &dev_priv->dev->pdev->dev,
- GFP_KERNEL, dev_priv,
- finish_csr_load);
-
- if (ret)
- DRM_ERROR("Failed to load DMC firmware, disabling rpm (%d)\n",
- ret);
+ schedule_work(&dev_priv->csr.work);
}
/**
--
2.1.4
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