On Wed, Sep 30, 2015 at 10:16:14AM -0700, O'Rourke, Tom wrote: > On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu....@intel.com wrote: > > From: Sagar Arun Kamble <sagar.a.kam...@intel.com> > > > > Due to flip interrupts GuC stays awake always and GT does not enter > > RC6. Do not route those interrupts to GuC for now. Driver won't touch > > DE_GUCRMR register and leave it as what default value. > > > > Signed-off-by: Sagar Arun Kamble <sagar.a.kam...@intel.com> > > Signed-off-by: Alex Dai <yu....@intel.com> > [TOR:] This patch was previously sent. Still looks good to me.
Yeah when resending reviewed patches please include the r-b tag to avoid wasting people's time. > > Reviewed-by: Tom O'Rourke <Tom.O'rou...@intel.com> Queued for -next, thanks for the patch. -Daniel > > > --- > > drivers/gpu/drm/i915/intel_guc_loader.c | 10 ---------- > > 1 file changed, 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c > > b/drivers/gpu/drm/i915/intel_guc_loader.c > > index ae85366..934b003 100644 > > --- a/drivers/gpu/drm/i915/intel_guc_loader.c > > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c > > @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct > > drm_i915_private *dev_priv) > > for_each_ring(ring, dev_priv, i) > > I915_WRITE(RING_MODE_GEN7(ring), irqs); > > > > - /* tell DE to send nothing to GuC */ > > - I915_WRITE(DE_GUCRMR, ~0); > > - > > /* route all GT interrupts to the host */ > > I915_WRITE(GUC_BCS_RCS_IER, 0); > > I915_WRITE(GUC_VCS2_VCS1_IER, 0); > > @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct > > drm_i915_private *dev_priv) > > for_each_ring(ring, dev_priv, i) > > I915_WRITE(RING_MODE_GEN7(ring), irqs); > > > > - /* tell DE to send (all) flip_done to GuC */ > > - irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE | > > - DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE | > > - DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE; > > - /* Unmasked bits will cause GuC response message to be sent */ > > - I915_WRITE(DE_GUCRMR, ~irqs); > > - > > /* route USER_INTERRUPT to Host, all others are sent to GuC. */ > > irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | > > GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT; > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
