Enable BIT 0 of MIPI Port Ctrl reg to enable dual link mode.

Signed-off-by: Deepak M <m.dee...@intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.si...@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h  |    7 ++++---
 drivers/gpu/drm/i915/intel_dsi.c |    9 ++++++---
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1ea4686..4e5c0bb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7581,17 +7581,17 @@ enum skl_disp_power_wells {
 /* BXT MIPI mode configure */
 #define  _BXT_MIPIA_TRANS_HACTIVE                      0x6B0F8
 #define  _BXT_MIPIC_TRANS_HACTIVE                      0x6B8F8
-#define  BXT_MIPI_TRANS_HACTIVE(tc)    _MIPI_PORT(tc, \
+#define  BXT_MIPI_TRANS_HACTIVE(port)  _MIPI_PORT(port, \
                _BXT_MIPIA_TRANS_HACTIVE, _BXT_MIPIC_TRANS_HACTIVE)
 
 #define  _BXT_MIPIA_TRANS_VACTIVE                      0x6B0FC
 #define  _BXT_MIPIC_TRANS_VACTIVE                      0x6B8FC
-#define  BXT_MIPI_TRANS_VACTIVE(tc)    _MIPI_PORT(tc, \
+#define  BXT_MIPI_TRANS_VACTIVE(port)  _MIPI_PORT(port, \
                _BXT_MIPIA_TRANS_VACTIVE, _BXT_MIPIC_TRANS_VACTIVE)
 
 #define  _BXT_MIPIA_TRANS_VTOTAL                       0x6B100
 #define  _BXT_MIPIC_TRANS_VTOTAL                       0x6B900
-#define  BXT_MIPI_TRANS_VTOTAL(tc)     _MIPI_PORT(tc, \
+#define  BXT_MIPI_TRANS_VTOTAL(port)   _MIPI_PORT(port, \
                _BXT_MIPIA_TRANS_VTOTAL, _BXT_MIPIC_TRANS_VTOTAL)
 
 #define BXT_DSI_PLL_CTL                        0x161000
@@ -7665,6 +7665,7 @@ enum skl_disp_power_wells {
 #define  LANE_CONFIGURATION_4LANE                      (0 << 0)
 #define  LANE_CONFIGURATION_DUAL_LINK_A                        (1 << 0)
 #define  LANE_CONFIGURATION_DUAL_LINK_B                        (2 << 0)
+#define  LANE_CONFIGURATION_DUAL_LINK_ENABLE           (1 << 0)
 
 #define _MIPIA_TEARING_CTRL                    (VLV_DISPLAY_BASE + 0x61194)
 #define _MIPIC_TEARING_CTRL                    (VLV_DISPLAY_BASE + 0x61704)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 2ccbda5..ec7e48b 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -400,9 +400,12 @@ static void intel_dsi_port_enable(struct intel_encoder 
*encoder)
                if (intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) {
                        temp |= (intel_dsi->dual_link - 1)
                                                << DUAL_LINK_MODE_SHIFT;
-                       temp |= intel_crtc->pipe ?
-                                       LANE_CONFIGURATION_DUAL_LINK_B :
-                                       LANE_CONFIGURATION_DUAL_LINK_A;
+                       if (IS_VALLEYVIEW(dev))
+                               temp |= intel_crtc->pipe ?
+                                               LANE_CONFIGURATION_DUAL_LINK_B :
+                                               LANE_CONFIGURATION_DUAL_LINK_A;
+                       else if (IS_BROXTON(dev))
+                               temp |= LANE_CONFIGURATION_DUAL_LINK_ENABLE;
                }
                /* assert ip_tg_enable signal */
                I915_WRITE(port_ctrl, temp | DPI_ENABLE);
-- 
1.7.9.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to