From: "Thulasimani,Sivakumar" <sivakumar.thulasim...@intel.com>
This reverts
commit: fe51bfb95c996733150c44d21e1c9f4b6322a326.
Author: Ville Syrjälä <ville.syrj...@linux.intel.com>
Date: Thu Mar 12 17:10:38 2015 +0200
CHV does not support intermediate frequencies so reverting the
patch that added it in the first place
Cc: sta...@vger.kernel.org
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasim...@intel.com>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b1fe32b..3e277c4 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -87,9 +87,6 @@ static const struct dp_link_dpll chv_dpll[] = {
/* Skylake supports following rates */
static const int gen9_rates[] = { 162000, 216000, 270000,
324000, 432000, 540000 };
-static const int chv_rates[] = { 162000, 202500, 210000, 216000,
- 243000, 270000, 324000, 405000,
- 420000, 432000, 540000 };
static const int default_rates[] = { 162000, 270000, 540000 };
/**
@@ -1169,9 +1166,6 @@ intel_dp_source_rates(struct drm_device *dev, const int
**source_rates)
if (INTEL_INFO(dev)->gen >= 9) {
*source_rates = gen9_rates;
return ARRAY_SIZE(gen9_rates);
- } else if (IS_CHERRYVIEW(dev)) {
- *source_rates = chv_rates;
- return ARRAY_SIZE(chv_rates);
}
*source_rates = default_rates;
--
1.7.9.5
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