From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Clean up the limited color range handling for SDVO as was done for
HDMI/DP previously.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_sdvo.c | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sdvo.c 
b/drivers/gpu/drm/i915/intel_sdvo.c
index c98098e..33e58c1 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -103,7 +103,7 @@ struct intel_sdvo {
         * This is used to select the color range of RBG outputs in HDMI mode.
         * It is only valid when using TMDS encoding and 8 bit per color mode.
         */
-       uint32_t color_range;
+       bool limited_color_range;
        bool color_range_auto;
 
        /**
@@ -1166,15 +1166,12 @@ static bool intel_sdvo_compute_config(struct 
intel_encoder *encoder,
 
        if (intel_sdvo->color_range_auto) {
                /* See CEA-861-E - 5.1 Default Encoding Parameters */
-               /* FIXME: This bit is only valid when using TMDS encoding and 8
-                * bit per color mode. */
-               if (pipe_config->has_hdmi_sink &&
-                   drm_match_cea_mode(adjusted_mode) > 1)
-                       pipe_config->limited_color_range = true;
+               pipe_config->limited_color_range =
+                       pipe_config->has_hdmi_sink &&
+                       drm_match_cea_mode(adjusted_mode) > 1;
        } else {
-               if (pipe_config->has_hdmi_sink &&
-                   intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
-                       pipe_config->limited_color_range = true;
+               pipe_config->limited_color_range =
+                       intel_sdvo->limited_color_range;
        }
 
        /* Clock computation needs to happen after pixel multiplier. */
@@ -1268,6 +1265,8 @@ static void intel_sdvo_pre_enable(struct intel_encoder 
*intel_encoder)
                /* The real mode polarity is set by the SDVO commands, using
                 * struct intel_sdvo_dtd. */
                sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
+               /* FIXME: this bit is only valid when using TMDS
+                * encoding and 8 bit per color mode. */
                if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range)
                        sdvox |= HDMI_COLOR_RANGE_16_235;
                if (INTEL_INFO(dev)->gen < 5)
@@ -2017,7 +2016,7 @@ intel_sdvo_set_property(struct drm_connector *connector,
 
        if (property == dev_priv->broadcast_rgb_property) {
                bool old_auto = intel_sdvo->color_range_auto;
-               uint32_t old_range = intel_sdvo->color_range;
+               bool old_range = intel_sdvo->limited_color_range;
 
                switch (val) {
                case INTEL_BROADCAST_RGB_AUTO:
@@ -2025,20 +2024,18 @@ intel_sdvo_set_property(struct drm_connector *connector,
                        break;
                case INTEL_BROADCAST_RGB_FULL:
                        intel_sdvo->color_range_auto = false;
-                       intel_sdvo->color_range = 0;
+                       intel_sdvo->limited_color_range = false;
                        break;
                case INTEL_BROADCAST_RGB_LIMITED:
                        intel_sdvo->color_range_auto = false;
-                       /* FIXME: this bit is only valid when using TMDS
-                        * encoding and 8 bit per color mode. */
-                       intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
+                       intel_sdvo->limited_color_range = true;
                        break;
                default:
                        return -EINVAL;
                }
 
                if (old_auto == intel_sdvo->color_range_auto &&
-                   old_range == intel_sdvo->color_range)
+                   old_range == intel_sdvo->limited_color_range)
                        return 0;
 
                goto done;
-- 
2.4.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to