On Thu, 30 Jul 2015, Sivakumar Thulasimani <sivakumar.thulasim...@intel.com> 
wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasim...@intel.com>
>
> BPP bits defined in VBT should be used only on panels whose
> edid version is 1.3 or older. EDID version 1.4 introduced offsets
> where bpp is defined and hence should be preferred over any value
> programmed in VBT.

Should we actually look at the EDID bpp somewhere?

> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasim...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 44f8a32..898dc74 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -132,6 +132,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, 
> bool sync);
>  static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
>  static void vlv_steal_power_sequencer(struct drm_device *dev,
>                                     enum pipe pipe);
> +static struct edid * intel_dp_get_edid(struct intel_dp *intel_dp);
>  
>  static int
>  intel_dp_max_link_bw(struct intel_dp  *intel_dp)
> @@ -1353,6 +1354,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>       enum port port = dp_to_dig_port(intel_dp)->port;
>       struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
>       struct intel_connector *intel_connector = intel_dp->attached_connector;
> +     struct edid *edid = NULL;
>       int lane_count, clock;
>       int min_lane_count = 1;
>       int max_lane_count = intel_dp_max_lane_count(intel_dp);
> @@ -1409,12 +1411,19 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>        * bpc in between. */
>       bpp = pipe_config->pipe_bpp;
>       if (is_edp(intel_dp)) {
> -             if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
> +             edid = intel_dp_get_edid(intel_dp);
> +
> +             /* Get bpp from vbt only for panels with edid 1.3 or older */
> +             if (edid && edid->version == 1 && edid->revision <= 3  &&
> +                     (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) 
> {

Now you require the panel to have an EDID in order to use the bpp in
VBT.

BR,
Jani.

>                       DRM_DEBUG_KMS("clamping bpp for eDP panel to 
> BIOS-provided %i\n",
>                                     dev_priv->vbt.edp_bpp);
>                       bpp = dev_priv->vbt.edp_bpp;
>               }
>  
> +             if (edid)
> +                     kfree(edid);
> +
>               /*
>                * Use the maximum clock and number of lanes the eDP panel
>                * advertizes being capable of. The panels are generally
> -- 
> 1.7.9.5
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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