From: Sourab Gupta <sourab.gu...@intel.com> The current perf PMU driver is specific for collection of OA counter statistics (which may be done in a periodic or asynchronous way). Since this enables us (and limits us) to render ring, we have no means for collection of data pertaining to other rings.
To overcome this limitation, we need to have a new PMU driver which enables data collection for other rings also (in a non-OA specific mode). This patch adds a new perf PMU to i915 device private, for handling profiling requests for non-OA counter data.This data may encompass timestamps, mmio register values, etc. for the relevant ring. The new perf PMU will serve these purposes, without constraining itself to type of data being dumped (which may constraint the user to specific ring like in case of OA counters). Signed-off-by: Sourab Gupta <sourab.gu...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 758d924..b8b5455 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1985,6 +1985,22 @@ struct drm_i915_private { struct completion complete; } oa_pmu; + struct { + struct pmu pmu; + spinlock_t lock; + struct hrtimer timer; + struct pt_regs dummy_regs; + struct perf_event *exclusive_event; + bool event_active; + + struct { + struct drm_i915_gem_object *obj; + u8 *addr; + u32 head; + u32 tail; + } buffer; + } gen_pmu; + struct list_head profile_cmd; #endif -- 1.8.5.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx