The TDR ULT used to validate this patch series requires a special uevent for
full GPU resets in order to distinguish between different kinds of resets.
Signed-off-by: Tomas Elf <tomas....@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 29 ++++++++++++++++++++++-------
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index d96d15f..770f526 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1449,18 +1449,33 @@ static int gen6_do_reset(struct drm_device *dev)
int intel_gpu_reset(struct drm_device *dev)
{
- if (INTEL_INFO(dev)->gen >= 6)
- return gen6_do_reset(dev);
+ int ret = -ENODEV;
+ int gen = INTEL_INFO(dev)->gen;
+
+ if (gen >= 6)
+ ret = gen6_do_reset(dev);
else if (IS_GEN5(dev))
- return ironlake_do_reset(dev);
+ ret = ironlake_do_reset(dev);
else if (IS_G4X(dev))
- return g4x_do_reset(dev);
+ ret = g4x_do_reset(dev);
else if (IS_G33(dev))
- return g33_do_reset(dev);
+ ret = g33_do_reset(dev);
else if (INTEL_INFO(dev)->gen >= 3)
- return i915_do_reset(dev);
+ ret = i915_do_reset(dev);
else
- return -ENODEV;
+ WARN(1, "Full GPU reset not supported on gen %d\n", gen);
+
+ if (!ret) {
+ char *reset_event[2];
+
+ reset_event[1] = NULL;
+ reset_event[0] = kasprintf(GFP_KERNEL, "%s", "GPU RESET=0");
+ kobject_uevent_env(&dev->primary->kdev->kobj,
+ KOBJ_CHANGE, reset_event);
+ kfree(reset_event[0]);
+ }
+
+ return ret;
}
void intel_uncore_check_errors(struct drm_device *dev)
--
1.7.9.5
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