On to, 2015-05-07 at 14:15 +0100, Nick Hoath wrote: > The following patch series either enables a workaround for Broxton, marks > it as applicable to Broxton, or moves it in to the SoC specific > initialisation. > > v2: Split out the changes as one patch per workaround (Requested by Imre) > Removed unused additional register. > Cleaned up whitespace. (Imre) > Cleaned up revision ID usage (Imre) > > Nick Hoath (9): > drm/i915/bxt: Mark WaDisablePartialInstShootdown as for Broxton also. > drm/i915/bxt: Mark workaround as for Skylake & Broxton > drm/i915/bxt: Enable WaDisableDgMirrorFixInHalfSliceChicken5 for > Broxton > drm/i915/bxt: Enable > WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken for Broxton > drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton > drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only > drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also. > drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also. > drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also. > > drivers/gpu/drm/i915/intel_ringbuffer.c | 49 > +++++++++++++++++---------------- > 1 file changed, 26 insertions(+), 23 deletions(-)
Looks ok, on the patchset: Reviewed-by: Imre Deak <imre.d...@intel.com> _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
