At Wed, 29 Apr 2015 17:49:25 +0800,
han...@intel.com wrote:
>
> From: "Lu, Han" <han...@intel.com>
>
> Add support for enabling codec wakeup override signal to allow
> re-enumeration of the controller on SKL after resume from low power state.
>
> v3 by Jani: Simplify to only support toggling the appropriate chicken bit.
>
> Signed-off-by: Lu, Han <han...@intel.com>
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
The patch series look OK to me.
But who will merge these?
I can merge these two patches to a branch so that it can be shared
between sound and i915 trees. Of course, only when I get ack about
the first patch.
thanks,
Takashi
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 36805b6..435c372 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6881,6 +6881,9 @@ enum skl_disp_power_wells {
> #define AUDIO_CP_READY(trans) ((1 << 1) << ((trans) * 4))
> #define AUDIO_ELD_VALID(trans) ((1 << 0) << ((trans) * 4))
>
> +#define HSW_AUD_CHICKENBIT 0x65f10
> +#define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
> +
> /* HSW Power Wells */
> #define HSW_PWR_WELL_BIOS 0x45400 /* CTL1 */
> #define HSW_PWR_WELL_DRIVER 0x45404 /* CTL2 */
> diff --git a/drivers/gpu/drm/i915/intel_audio.c
> b/drivers/gpu/drm/i915/intel_audio.c
> index f72e93a..ceb2328 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -474,6 +474,32 @@ static void i915_audio_component_put_power(struct device
> *dev)
> intel_display_power_put(dev_to_i915(dev), POWER_DOMAIN_AUDIO);
> }
>
> +static void i915_audio_component_codec_wake_override(struct device *dev,
> + bool enable)
> +{
> + struct drm_i915_private *dev_priv = dev_to_i915(dev);
> + u32 tmp;
> +
> + if (!IS_SKYLAKE(dev_priv))
> + return;
> +
> + /*
> + * Enable/disable generating the codec wake signal, overriding the
> + * internal logic to generate the codec wake to controller.
> + */
> + tmp = I915_READ(HSW_AUD_CHICKENBIT);
> + tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL;
> + I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
> + usleep_range(1000, 1500);
> +
> + if (enable) {
> + tmp = I915_READ(HSW_AUD_CHICKENBIT);
> + tmp |= SKL_AUD_CODEC_WAKE_SIGNAL;
> + I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
> + usleep_range(1000, 1500);
> + }
> +}
> +
> /* Get CDCLK in kHz */
> static int i915_audio_component_get_cdclk_freq(struct device *dev)
> {
> @@ -495,6 +521,7 @@ static const struct i915_audio_component_ops
> i915_audio_component_ops = {
> .owner = THIS_MODULE,
> .get_power = i915_audio_component_get_power,
> .put_power = i915_audio_component_put_power,
> + .codec_wake_override = i915_audio_component_codec_wake_override,
> .get_cdclk_freq = i915_audio_component_get_cdclk_freq,
> };
>
> diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h
> index 3e2f22e..c9a8b64 100644
> --- a/include/drm/i915_component.h
> +++ b/include/drm/i915_component.h
> @@ -31,6 +31,7 @@ struct i915_audio_component {
> struct module *owner;
> void (*get_power)(struct device *);
> void (*put_power)(struct device *);
> + void (*codec_wake_override)(struct device *, bool enable);
> int (*get_cdclk_freq)(struct device *);
> } *ops;
> };
> --
> 1.9.1
>
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