On Fri, Apr 17, 2015 at 02:21:12PM -0700, yu....@intel.com wrote: > From: Alex Dai <yu....@intel.com> > > All gem objects used by GuC are pinned to ggtt space out of range > [0, WOPCM size]. In GuC address space mapping, [0, WPOCM size] is > used internally for its Boot ROM, SRAM etc. Currently this WPOCM > size is 512K. This is done by using of PIN_OFFSET_BIAS.
If the region is reserved, remove that region from the GGTT drm_mm range manager. Then the restriction is applied to all objects and not in a hodge-podge fashion like this. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
