Initializing scalers with supported values during crtc init. v2: -initialize single copy of min/max values (Matt)
v3: -moved gen check to callsite (Matt) v4: -squashed planes begin with no scaler to here (me) Signed-off-by: Chandra Konduru <chandra.kond...@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 54 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_sprite.c | 1 + 2 files changed, 55 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e2507f5..ee71bde 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -103,6 +103,8 @@ static void chv_prepare_pll(struct intel_crtc *crtc, const struct intel_crtc_state *pipe_config); static void intel_begin_crtc_commit(struct drm_crtc *crtc); static void intel_finish_crtc_commit(struct drm_crtc *crtc); +static void skl_init_scalers(struct drm_device *dev, int pipe, + struct intel_crtc_state *crtc_state); static struct intel_encoder *intel_find_encoder(struct intel_connector *connector, int pipe) { @@ -12767,6 +12769,7 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev, primary->can_scale = false; primary->max_downscale = 1; + state->scaler_id = -1; primary->pipe = pipe; primary->plane = pipe; primary->check_plane = intel_check_primary_plane; @@ -12922,6 +12925,7 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, cursor->max_downscale = 1; cursor->pipe = pipe; cursor->plane = pipe; + state->scaler_id = -1; cursor->check_plane = intel_check_cursor_plane; cursor->commit_plane = intel_commit_cursor_plane; @@ -12948,6 +12952,52 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, return &cursor->base; } +static void skl_init_scalers(struct drm_device *dev, int pipe, + struct intel_crtc_state *crtc_state) +{ + int i; + struct intel_scaler *intel_scaler; + struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; + + scaler_state->num_scalers = SKL_NUM_SCALERS; + for (i = 0; i < SKL_NUM_SCALERS; i++) { + intel_scaler = &scaler_state->scalers[i]; + intel_scaler->in_use = 0; + intel_scaler->id = i; + + intel_scaler->mode = PS_SCALER_MODE_DYN; + intel_scaler->filter = PS_FILTER_MEDIUM; + } + + /* down scaling ratio: 2.99 --> 1, i.e., 34% of original */ + scaler_state->min_hsr = 34; + scaler_state->min_vsr = 34; + scaler_state->max_hsr = 500; + scaler_state->max_vsr = 500; + + /* down scaling ratio: 2.99x2.99 --> 1x1, i.e., 12% of original */ + scaler_state->min_hvsr = 12; + scaler_state->max_hvsr = 2500; + + /* src_w & dst_w range 8 - 4096 */ + scaler_state->min_src_w = 8; + scaler_state->max_src_w = 4096; + scaler_state->min_dst_w = 8; + scaler_state->max_dst_w = 4096; + + /* src_h & dst_h range 8 - 2304 */ + scaler_state->min_src_h = 8; + scaler_state->max_src_h = 2304; + scaler_state->min_dst_h = 8; + scaler_state->max_dst_h = 2304; + + /* pipe C has one scaler */ + if (pipe == PIPE_C) { + scaler_state->num_scalers = 1; + } + scaler_state->scaler_id = -1; +} + static void intel_crtc_init(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -12967,6 +13017,10 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) intel_crtc_set_state(intel_crtc, crtc_state); crtc_state->base.crtc = &intel_crtc->base; + /* initialize shared scalers */ + if (INTEL_INFO(dev)->gen >= 9) + skl_init_scalers(dev, pipe, crtc_state); + primary = intel_primary_plane_create(dev, pipe); if (!primary) goto fail; diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 66b424b..ac4aa68 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1263,6 +1263,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) intel_plane->max_downscale = 1; intel_plane->update_plane = skl_update_plane; intel_plane->disable_plane = skl_disable_plane; + state->scaler_id = -1; plane_formats = skl_plane_formats; num_plane_formats = ARRAY_SIZE(skl_plane_formats); -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx