From: Ville Syrjälä <ville.syrj...@linux.intel.com> A address-only I2C_WRITE can't be replied with a short i2c ack, but I suppose it could be replied with an i2c defer. So the code should be prepared for an address-only I2C_WRITE_STATUS_UPDATE.
Cc: Thierry Reding <thierry.red...@gmail.com> Cc: "Terje Bergström" <tbergst...@nvidia.com> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> --- drivers/gpu/drm/tegra/dpaux.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index b1617af..a48687a 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm/tegra/dpaux.c @@ -122,6 +122,7 @@ static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux, */ if (msg->size < 1) { switch (msg->request & ~DP_AUX_I2C_MOT) { + case DP_AUX_I2C_WRITE_STATUS_UPDATE: case DP_AUX_I2C_WRITE: case DP_AUX_I2C_READ: value = DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY; -- 2.0.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx