> -----Original Message-----
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, March 09, 2015 8:02 PM
> To: Zou, Nanhai
> Cc: Daniel Vetter; Song, Ruiling; Vetter, Daniel; 
> intel-gfx@lists.freedesktop.org;
> Yang, Rong R; beig...@lists.freedesktop.org; Weinehall, David
> Subject: Re: [Beignet] [Intel-gfx] Preventing zero GPU virtual address 
> allocation
> 
> On Mon, Mar 09, 2015 at 02:34:46AM +0000, Zou, Nanhai wrote:
> > We don't need MAP_FIXED, we just want to avoid address 0 to be allocated.
> >
> > Though I think using MAP_FIXED is overkill, will bring much unnecessary
> complexity on both kernel and beignet side.
> > I don't mind if people can provide stable MAP_FIXED patches to resolve this
> problem a few months or years later.
> >
> > At that time, kernel driver can revert the reserve page 0 patch.
> > Before that reserve page 0 can benefit all the Beignet user without breaking
> anything.
> 
> The point is that is becomes ABI. So no the kernel can't just revert it.
> There is nothing special about address 0 in ether GTT or virtual memory.
> If you require a special object allocated at address 0, allocate a special 
> object
> at address 0.
> -Chris


Hi,
        Zero page is not an ABI, It is only a strategy of virtual space 
allocation.
        Nobody would need exactly a page of virtual address 0. So there is no 
dependency.
        
        Zero page is a very common used method to avoid the NULL pointer issue.
        See http://en.wikipedia.org/wiki/Zero_page

        I can see a lot of issue to do that with MAP_FIXED zero page in user 
space.

        Say if a program combine libva, beignet and mesa or other graphics 
components together, 
        which component should be responsible of allocating this zero page?

        What if a component happened to allocate a page in offset 0 before 
beignet and release it later? 
        Using a zero page just remove the unnecessary mess and resolve problem 
in a clean explicit way.


Thanks
Zou Nanhai


> --
> Chris Wilson, Intel Open Source Technology Centre
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