On Mon, 09 Mar 2015, Ander Conselvan de Oliveira
<ander.conselvan.de.olive...@intel.com> wrote:
> When enabling pipe C, the check for the number of lanes pipe B uses was
> ignored in case pipe B wasn't active. This would allow pipe C to be
> configured while pipe B is in DPMS off state even if it used more than 2
> lanes. Making pipe B active again while pipe C was also active would
> then fail.
Seems like a good catch. Broken when, or since forever? Cc: stable?
Bugzillas?
BR,
Jani.
>
> Tested-by: Ander Conselvan de Oliveira <ander.conselvan.de.olive...@intel.com>
> Signed-off-by: Ander Conselvan de Oliveira
> <ander.conselvan.de.olive...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 597c10b..4008bf4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3150,8 +3150,7 @@ static void intel_fdi_normal_train(struct drm_crtc
> *crtc)
>
> static bool pipe_has_enabled_pch(struct intel_crtc *crtc)
> {
> - return crtc->base.state->enable && crtc->active &&
> - crtc->config->has_pch_encoder;
> + return crtc->base.state->enable && crtc->config->has_pch_encoder;
> }
>
> static void ivb_modeset_global_resources(struct drm_device *dev)
> --
> 2.1.0
>
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--
Jani Nikula, Intel Open Source Technology Center
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