On Thu, Feb 05, 2015 at 01:00:53PM -0800, Matt Roper wrote:
> On Thu, Feb 05, 2015 at 07:35:13PM +0000, Damien Lespiau wrote:
> > We don't want to end up in a state where we track that the pipe has its
> > primary plane enabled when primary plane registers are programmed with
> > values that look possible but the plane actually disabled.
> > 
> > Refuse to read out the fb state when the primary plane isn't enabled.
> > 
> > Suggested-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> > Suggested-by: Matt Roper <matthew.d.ro...@intel.com>
> > Signed-off-by: Damien Lespiau <damien.lesp...@intel.com>
> 
> For the series:
> 
> Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>

All merged, thanks for patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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