On Thu, Jan 29, 2015 at 12:42:35PM +0000, Damien Lespiau wrote:
> Suggested-by: Daniel Vetter <dan...@ffwll.ch>
> Signed-off-by: Damien Lespiau <damien.lesp...@intel.com>
Hm, I've thought the magic bit moved ... or have you found it in configdb
again?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index 0e9bf82..0a1089b 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -329,7 +329,8 @@ static void __intel_uncore_early_sanitize(struct
> drm_device *dev,
> if (HAS_FPGA_DBG_UNCLAIMED(dev))
> __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
>
> - if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) &&
> + if ((IS_HASWELL(dev) || IS_BROADWELL(dev) ||
> + INTEL_INFO(dev)->gen >= 9) &&
> (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) == 1)) {
> /* The docs do not explain exactly how the calculation can be
> * made. It is somewhat guessable, but for now, it's always
> --
> 1.8.3.1
>
> _______________________________________________
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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