On Thu, 2014-11-20 at 23:01 +0200, Imre Deak wrote:
> Atm, we don't disable RPS interrupts and related work items before
> resetting the GPU. This may interfere with the following GPU
> initialization and cause RPS interrupts to show up in PM_IIR too early
> before calling gen6_enable_rps_interrupts() (triggering a WARN there).
> 
> Solve this by disabling RPS interrupts and flushing any related work
> items before resetting the GPU.
> 
> Reported-by: He, Shuang <shuang...@intel.com>
> Testcase: igt/gem_reset_stats/ban-render
> Signed-off-by: Imre Deak <imre.d...@intel.com>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86644

> ---
>  drivers/gpu/drm/i915/i915_drv.c |  5 ++++-
>  drivers/gpu/drm/i915/intel_pm.c | 14 +++++++++++++-
>  2 files changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1df4079..93f3df8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -810,6 +810,9 @@ int i915_reset(struct drm_device *dev)
>       if (!i915.reset)
>               return 0;
>  
> +     if (drm_core_check_feature(dev, DRIVER_MODESET))
> +             intel_reset_gt_powersave(dev);
> +
>       mutex_lock(&dev->struct_mutex);
>  
>       i915_gem_reset(dev);
> @@ -879,7 +882,7 @@ int i915_reset(struct drm_device *dev)
>                * of re-init after reset.
>                */
>               if (INTEL_INFO(dev)->gen > 5)
> -                     intel_reset_gt_powersave(dev);
> +                     intel_enable_gt_powersave(dev);
>       } else {
>               mutex_unlock(&dev->struct_mutex);
>       }
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e361014..9417f8f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6316,8 +6316,20 @@ void intel_reset_gt_powersave(struct drm_device *dev)
>  {
>       struct drm_i915_private *dev_priv = dev->dev_private;
>  
> +     if (INTEL_INFO(dev)->gen < 6)
> +             return;
> +
> +     flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> +
> +     /*
> +      * TODO: disable RPS interrupts on GEN9+ too once RPS support
> +      * is added for it.
> +      */
> +     if (INTEL_INFO(dev)->gen < 9)
> +             gen6_disable_rps_interrupts(dev);
> +
>       dev_priv->rps.enabled = false;
> -     intel_enable_gt_powersave(dev);
> +
>  }
>  
>  static void ibx_init_clock_gating(struct drm_device *dev)


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