Signed-off-by: Damien Lespiau <damien.lesp...@intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b5a279a..924f1ec 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -767,12 +767,20 @@ static void skl_ddi_clock_get(struct intel_encoder
*encoder,
pipe_config->port_clock = link_clock;
+ /*
+ * On SKL the eDP DPLL (DPLL0 as we don't use SSC) is not part of the
+ * shared DPLL framework and thus needs to be read out separately
+ */
+ if (encoder->type == INTEL_OUTPUT_EDP)
+ pipe_config->dpll_hw_state.ctrl1 = (dpll_ctl1 >> (dpll * 6)) &
0x3f;
+
if (pipe_config->has_dp_encoder)
pipe_config->adjusted_mode.crtc_clock =
intel_dotclock_calculate(pipe_config->port_clock,
&pipe_config->dp_m_n);
else
pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
+
}
static void hsw_ddi_clock_get(struct intel_encoder *encoder,
--
1.8.3.1
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