On Fri, Nov 07, 2014 at 02:22:06PM -0800, bradley.d.vol...@intel.com wrote: > From: Brad Volkin <bradley.d.vol...@intel.com> > > By adding a new exec_entry flag, we cleanly mark the shadow objects > as purgeable after they are on the active list. > > Signed-off-by: Brad Volkin <bradley.d.vol...@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index 20835b8..a271bc0 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -37,6 +37,7 @@ > #define __EXEC_OBJECT_HAS_FENCE (1<<30) > #define __EXEC_OBJECT_NEEDS_MAP (1<<29) > #define __EXEC_OBJECT_NEEDS_BIAS (1<<28) > +#define __EXEC_OBJECT_PURGEABLE (1<<27) > > #define BATCH_OFFSET_BIAS (256*1024) > > @@ -223,7 +224,12 @@ i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma) > if (entry->flags & __EXEC_OBJECT_HAS_PIN) > vma->pin_count--; > > - entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN); > + if (entry->flags & __EXEC_OBJECT_PURGEABLE) > + obj->madv = I915_MADV_DONTNEED; > + > + entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | > + __EXEC_OBJECT_HAS_PIN | > + __EXEC_OBJECT_PURGEABLE); > } > > static void eb_destroy(struct eb_vmas *eb) > @@ -1373,6 +1379,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void > *data, > goto err; > } > > + shadow_batch_obj->madv = I915_MADV_WILLNEED; > +
Imo this hunk should be int the pool _get function so that all the purgeable/willneed handling is in one place. -Daniel > ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0); > if (ret) > goto err; > @@ -1396,6 +1404,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void > *data, > > vma = i915_gem_obj_to_ggtt(shadow_batch_obj); > vma->exec_entry = &shadow_exec_entry; > + vma->exec_entry->flags = __EXEC_OBJECT_PURGEABLE; > drm_gem_object_reference(&shadow_batch_obj->base); > list_add_tail(&vma->exec_list, &eb->vmas); > > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
