Altought VLV/CHV PSR supports per pipe PSR on VLV it isn't available
on pipe C.
Cherryview supports on all 3 pipes.
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ded73ae..b93eb40 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2370,6 +2370,14 @@ static bool intel_edp_psr_match_conditions(struct
intel_dp *intel_dp)
return false;
}
+ /* Baytrail supports per-pipe PSR configuration, however it is
+ * available only on pipes A and B.
+ */
+ if (IS_VALLEYVIEW(dev) && intel_crtc->pipe == PIPE_C) {
+ DRM_DEBUG_KMS("PSR on BYT isn't available on pipe C.\n");
+ return false;
+ }
+
out:
dev_priv->psr.source_ok = true;
return true;
--
1.9.3
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