Signed-off-by: Ander Conselvan de Oliveira
<ander.conselvan.de.olive...@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 610de3f..9475271 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7320,9 +7320,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc
*intel_crtc,
return dpll | DPLL_VCO_ENABLE;
}
-static int ironlake_crtc_mode_set(struct intel_crtc *crtc,
- int x, int y,
- struct drm_framebuffer *fb)
+static int ironlake_crtc_compute_clock(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
intel_clock_t clock, reduced_clock;
@@ -7368,17 +7366,13 @@ static int ironlake_crtc_mode_set(struct intel_crtc
*crtc,
else
crtc->new_config->dpll_hw_state.fp1 = fp;
- if (intel_crtc_to_shared_dpll(crtc))
- intel_put_shared_dpll(crtc);
-
pll = intel_get_shared_dpll(crtc);
if (pll == NULL) {
DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
pipe_name(crtc->pipe));
return -EINVAL;
}
- } else
- intel_put_shared_dpll(crtc);
+ }
if (is_lvds && has_reduced_clock && i915.powersave)
crtc->lowfreq_avail = true;
@@ -12664,8 +12658,9 @@ static void intel_init_display(struct drm_device *dev)
} else if (HAS_PCH_SPLIT(dev)) {
dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
dev_priv->display.get_plane_config = ironlake_get_plane_config;
- dev_priv->display.crtc_compute_clock = NULL;
- dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set;
+ dev_priv->display.crtc_compute_clock =
+ ironlake_crtc_compute_clock;
+ dev_priv->display.crtc_mode_set = NULL;
dev_priv->display.crtc_enable = ironlake_crtc_enable;
dev_priv->display.crtc_disable = ironlake_crtc_disable;
dev_priv->display.off = ironlake_crtc_off;
--
1.9.1
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