On Fri, Sep 26, 2014 at 03:03:19PM +0300, Mika Kuoppala wrote:
> Rodrigo Vivi <rodrigo.v...@intel.com> writes:
>
> > Program the default initial value of the L3SqcReg1 on BDW for performance
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > drivers/gpu/drm/i915/intel_pm.c | 3 +++
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 124ea60..8aafa08 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4821,6 +4821,9 @@ enum punit_power_well {
> > #define GEN7_L3SQCREG1 0xB010
> > #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000
> >
> > +#define GEN8_L3SQCREG1 0xB100
> > +#define BDW_WA_L3SQCREG1_DEFAULT 0x00610000
> > +
>
> This is the default after reset. I think we want 0x00810000
Digging through some attached mails in the hsd I found this number:
0x00784000
This w/a seems to be a real mess. No bspec update, no actual infromation
in the w/a db, and even the hsd stuff is more or less useless until you
notice there's some attached email dump that has the actual number :(
>
> -Mika
>
> > #define GEN7_L3CNTLREG1 0xB01C
> > #define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C47FF8C
> > #define GEN7_L3AGDIS (1<<19)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 1ec3c8f..8a58565 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5811,6 +5811,9 @@ static void broadwell_init_clock_gating(struct
> > drm_device *dev)
> > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> > GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> >
> > + /* WaProgramL3SqcReg1Default:bdw */
> > + I915_WRITE(GEN8_L3SQCREG1, BDW_WA_L3SQCREG1_DEFAULT);
> > +
>
> Should we use intel_ring_emit_wa?
>
> -Mika
>
> > lpt_init_clock_gating(dev);
> > }
> >
> > --
> > 1.9.3
> >
> > _______________________________________________
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> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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--
Ville Syrjälä
Intel OTC
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