[Intel-gfx] [PATCH 1/9] drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg

[Gaurav K Singh]

This patch is in preparation for the dual link port enable and disable related 
changes.

Signed-off-by: Gaurav K Singh <gaurav.k.si...@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c |   43 ++++++++++++++++++++++++++++----------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 5bd9e09..e456ca9 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -102,6 +102,36 @@ static bool intel_dsi_compute_config(struct intel_encoder 
*encoder,
        return true;
 }
 
+static void intel_dsi_port_enable(struct intel_encoder *encoder)
+{
+       struct drm_device *dev = encoder->base.dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+       struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+       enum pipe pipe = intel_crtc->pipe;
+       u32 temp;
+
+       /* assert ip_tg_enable signal */
+       temp = I915_READ(MIPI_PORT_CTRL(pipe)) & ~LANE_CONFIGURATION_MASK;
+       temp = temp | intel_dsi->port_bits;
+       I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE);
+       POSTING_READ(MIPI_PORT_CTRL(pipe));
+}
+
+static void intel_dsi_port_disable(struct intel_encoder *encoder)
+{
+       struct drm_device *dev = encoder->base.dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+       enum pipe pipe = intel_crtc->pipe;
+       u32 temp;
+
+       /* de-assert ip_tg_enable signal */
+       temp = I915_READ(MIPI_PORT_CTRL(pipe));
+       I915_WRITE(MIPI_PORT_CTRL(pipe), temp & ~DPI_ENABLE);
+       POSTING_READ(MIPI_PORT_CTRL(pipe));
+}
+
 static void intel_dsi_device_ready(struct intel_encoder *encoder)
 {
        struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
@@ -141,7 +171,6 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
        int pipe = intel_crtc->pipe;
-       u32 temp;
 
        DRM_DEBUG_KMS("\n");
 
@@ -157,11 +186,7 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 
                wait_for_dsi_fifo_empty(intel_dsi);
 
-               /* assert ip_tg_enable signal */
-               temp = I915_READ(MIPI_PORT_CTRL(pipe)) & 
~LANE_CONFIGURATION_MASK;
-               temp = temp | intel_dsi->port_bits;
-               I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE);
-               POSTING_READ(MIPI_PORT_CTRL(pipe));
+               intel_dsi_port_enable(encoder);
        }
 }
 
@@ -245,11 +270,7 @@ static void intel_dsi_disable(struct intel_encoder 
*encoder)
        if (is_vid_mode(intel_dsi)) {
                wait_for_dsi_fifo_empty(intel_dsi);
 
-               /* de-assert ip_tg_enable signal */
-               temp = I915_READ(MIPI_PORT_CTRL(pipe));
-               I915_WRITE(MIPI_PORT_CTRL(pipe), temp & ~DPI_ENABLE);
-               POSTING_READ(MIPI_PORT_CTRL(pipe));
-
+               intel_dsi_port_disable(encoder);
                msleep(2);
        }
 
-- 
1.7.9.5

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