Signed-off-by: Gaurav K Singh <gaurav.k.si...@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c |   37 +++++++++++++++++++++++++++----------
 1 file changed, 27 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 583c7fd..6aac420 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -502,12 +502,23 @@ static void set_dsi_timings(struct drm_encoder *encoder,
        unsigned int lane_count = intel_dsi->lane_count;
 
        u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
+       int count = 1;
 
        hactive = mode->hdisplay;
        hfp = mode->hsync_start - mode->hdisplay;
        hsync = mode->hsync_end - mode->hsync_start;
        hbp = mode->htotal - mode->hsync_end;
 
+       if (intel_dsi->dual_link) {
+               hactive /= 2;
+               if (intel_dsi->dual_link & MIPI_DUAL_LINK_FRONT_BACK)
+                       hactive += intel_dsi->pixel_overlap;
+               hfp /= 2;
+               hsync /= 2;
+               hbp /= 2;
+               count = 2;
+       }
+
        vfp = mode->vsync_start - mode->vdisplay;
        vsync = mode->vsync_end - mode->vsync_start;
        vbp = mode->vtotal - mode->vsync_end;
@@ -520,18 +531,24 @@ static void set_dsi_timings(struct drm_encoder *encoder,
                            intel_dsi->burst_mode_ratio);
        hbp = txbyteclkhs(hbp, bpp, lane_count, intel_dsi->burst_mode_ratio);
 
-       I915_WRITE(MIPI_HACTIVE_AREA_COUNT(pipe), hactive);
-       I915_WRITE(MIPI_HFP_COUNT(pipe), hfp);
+       do {
+               I915_WRITE(MIPI_HACTIVE_AREA_COUNT(pipe), hactive);
+               I915_WRITE(MIPI_HFP_COUNT(pipe), hfp);
+
+               /* meaningful for video mode non-burst sync pulse mode only,
+                * can be zero for non-burst sync events and burst modes */
+               I915_WRITE(MIPI_HSYNC_PADDING_COUNT(pipe), hsync);
+               I915_WRITE(MIPI_HBP_COUNT(pipe), hbp);
 
-       /* meaningful for video mode non-burst sync pulse mode only, can be zero
-        * for non-burst sync events and burst modes */
-       I915_WRITE(MIPI_HSYNC_PADDING_COUNT(pipe), hsync);
-       I915_WRITE(MIPI_HBP_COUNT(pipe), hbp);
+               /* vertical values are in terms of lines */
+               I915_WRITE(MIPI_VFP_COUNT(pipe), vfp);
+               I915_WRITE(MIPI_VSYNC_PADDING_COUNT(pipe), vsync);
+               I915_WRITE(MIPI_VBP_COUNT(pipe), vbp);
 
-       /* vertical values are in terms of lines */
-       I915_WRITE(MIPI_VFP_COUNT(pipe), vfp);
-       I915_WRITE(MIPI_VSYNC_PADDING_COUNT(pipe), vsync);
-       I915_WRITE(MIPI_VBP_COUNT(pipe), vbp);
+               /* For Port C for dual link */
+               if (intel_dsi->dual_link)
+                       pipe = PIPE_B;
+       } while (--count > 0);
 }
 
 static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
-- 
1.7.9.5

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