On Thu, 2014-09-04 at 12:27 +0100, Damien Lespiau wrote:
> From: Satheeshakrishna M <satheeshakrishn...@intel.com>
> 
> Adding new power doamins for AUX controllers
> 
> v2: Added new power domains in power_domain_str per Imre's comment
> 
> v3: Added AUX power domains to older platforms
> 
> v4: Rebase on top of POWER_DOMAIN_PLLS.
> 
> Signed-off-by: Satheeshakrishna M <satheeshakrishn...@intel.com>
> Signed-off-by: Damien Lespiau <damien.lesp...@intel.com> (v3)
> Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> ---

This needs to be rebased on the recent CHV changes, adding the AUX
domains to the CMN and TX wells similarly to the VLV mappings. With that
this looks ok:
Reviewed-by: Imre Deak <imre.d...@intel.com>

>  drivers/gpu/drm/i915/i915_debugfs.c |  8 ++++++++
>  drivers/gpu/drm/i915/i915_drv.h     |  4 ++++
>  drivers/gpu/drm/i915/intel_pm.c     | 12 ++++++++++++
>  3 files changed, 24 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 88a4643..02cb310 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2273,6 +2273,14 @@ static const char *power_domain_str(enum 
> intel_display_power_domain domain)
>               return "AUDIO";
>       case POWER_DOMAIN_PLLS:
>               return "PLLS";
> +     case POWER_DOMAIN_AUX_A:
> +             return "AUX_A";
> +     case POWER_DOMAIN_AUX_B:
> +             return "AUX_B";
> +     case POWER_DOMAIN_AUX_C:
> +             return "AUX_C";
> +     case POWER_DOMAIN_AUX_D:
> +             return "AUX_D";
>       case POWER_DOMAIN_INIT:
>               return "INIT";
>       default:
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a6e14db..91ea2b7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -138,6 +138,10 @@ enum intel_display_power_domain {
>       POWER_DOMAIN_VGA,
>       POWER_DOMAIN_AUDIO,
>       POWER_DOMAIN_PLLS,
> +     POWER_DOMAIN_AUX_A,
> +     POWER_DOMAIN_AUX_B,
> +     POWER_DOMAIN_AUX_C,
> +     POWER_DOMAIN_AUX_D,
>       POWER_DOMAIN_INIT,
>  
>       POWER_DOMAIN_NUM,
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 74a8519..ec849db 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7664,6 +7664,10 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
>       BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) |          \
>       BIT(POWER_DOMAIN_PORT_CRT) |                    \
>       BIT(POWER_DOMAIN_PLLS) |                        \
> +     BIT(POWER_DOMAIN_AUX_A) |                       \
> +     BIT(POWER_DOMAIN_AUX_B) |                       \
> +     BIT(POWER_DOMAIN_AUX_C) |                       \
> +     BIT(POWER_DOMAIN_AUX_D) |                       \
>       BIT(POWER_DOMAIN_INIT))
>  #define HSW_DISPLAY_POWER_DOMAINS (                          \
>       (POWER_DOMAIN_MASK & ~HSW_ALWAYS_ON_POWER_DOMAINS) |    \
> @@ -7685,24 +7689,32 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
>       BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) |  \
>       BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) |  \
>       BIT(POWER_DOMAIN_PORT_CRT) |            \
> +     BIT(POWER_DOMAIN_AUX_A) |               \
> +     BIT(POWER_DOMAIN_AUX_B) |               \
> +     BIT(POWER_DOMAIN_AUX_C) |               \
> +     BIT(POWER_DOMAIN_AUX_D) |               \
>       BIT(POWER_DOMAIN_INIT))
>  
>  #define VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS (       \
>       BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) |  \
>       BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) |  \
> +     BIT(POWER_DOMAIN_AUX_B) |               \
>       BIT(POWER_DOMAIN_INIT))
>  
>  #define VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS (       \
>       BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) |  \
> +     BIT(POWER_DOMAIN_AUX_B) |               \
>       BIT(POWER_DOMAIN_INIT))
>  
>  #define VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS (       \
>       BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) |  \
>       BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) |  \
> +     BIT(POWER_DOMAIN_AUX_C) |               \
>       BIT(POWER_DOMAIN_INIT))
>  
>  #define VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS (       \
>       BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) |  \
> +     BIT(POWER_DOMAIN_AUX_C) |               \
>       BIT(POWER_DOMAIN_INIT))
>  
>  #define CHV_PIPE_A_POWER_DOMAINS (   \

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