On Wed, 27 Aug 2014 10:43:37 +0200 Daniel Vetter <daniel.vet...@ffwll.ch> wrote:
> Now that vlv has runtime pm we kinda should check for that like on the > pch split platforms. Looks like this was simply lost in the vlv rpm > enabling. > > Cc: Paulo Zanoni <paulo.r.zan...@intel.com> > Cc: Imre Deak <imre.d...@intel.com> > Cc: Jesse Barnes <jbar...@virtuousgeek.org> > Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch> > --- > drivers/gpu/drm/i915/i915_irq.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 9eb303c1b621..76bc4d0de5a4 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -589,6 +589,7 @@ __i915_enable_pipestat(struct drm_i915_private *dev_priv, > enum pipe pipe, > u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK; > > assert_spin_locked(&dev_priv->irq_lock); > + WARN_ON(!intel_irqs_enabled(dev_priv)); > > if (WARN_ONCE(enable_mask & ~PIPESTAT_INT_ENABLE_MASK || > status_mask & ~PIPESTAT_INT_STATUS_MASK, > @@ -615,6 +616,7 @@ __i915_disable_pipestat(struct drm_i915_private > *dev_priv, enum pipe pipe, > u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK; > > assert_spin_locked(&dev_priv->irq_lock); > + WARN_ON(!intel_irqs_enabled(dev_priv)); > > if (WARN_ONCE(enable_mask & ~PIPESTAT_INT_ENABLE_MASK || > status_mask & ~PIPESTAT_INT_STATUS_MASK, Yeah looks good, wonder if it'll trigger any new warnings. Reviewed-by: Jesse Barnes <jbar...@virtuousgeek.org> -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
