On Thu, Jul 24, 2014 at 11:43:11AM +0100, Siluvery, Arun wrote: > On 07/07/2014 22:24, Daniel Vetter wrote: > >On Mon, Jul 7, 2014 at 11:16 PM, Jesse Barnes <jbar...@virtuousgeek.org> > >wrote: > >>I don't think it's unreasonable to use a macro that checks a global > >>list for whether to apply a given WA. They'll be scattered all over, > >>but at least it'll be easy to see: > >> 1) whether we implement a given workaround > >>and > >> 2) which platforms & steppings it applies to based on the table. > > > >Oh, I agree it's not unreasonable. But I'm kinda begging for the > >simple solution since months (years?) and haven't gotten it, while > >still getting a steady stream of bug reports and issues. So I've > >readjusted my expectations ;-) > > > >If someone delivers the real deal I'll certainly won't reject it. > >-Daniel > > > > I am moving bdw workarounds from clock_gating fn to render ring init fn and > testing this before and after gpu reset.
Testing = with an igt? Because I'll ask for this ;-) > One of the workaround is to disable STC optimization, reg CACHE_MODE_1 bit6 > set to 1. I observed that some times after boot this gets reset to 0 > (default value) even after applying workarounds; other than workarounds no > one else seems to write to this function. > Any ideas about this behaviour? gpu init tends to do this, since clock_gating is run before that. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
