On 7/15/2014 2:41 PM, Daniel Vetter wrote:
On Tue, Jul 15, 2014 at 02:10:28PM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal <sonika.jin...@intel.com>

Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.

v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.

v3: Checking if CRTC is active before issueing update_plane. Added
wait for vblank to make sure we dont overtake page flips. Disabling
FBC since it does not work with rotated planes.

v4: Updated rotation checks for pending flips, fbc disable. Creating
rotation property only for Gen4 onwards. Property resetting as part
of lastclose.

v5: Resetting property in i915_driver_lastclose properly for planes
and crtcs. Fixed linear offset calculation that was off by 1 w.r.t
width in i9xx_update_plane and ironlake_update_plane. Removed tab
based indentation and unnecessary braces in intel_crtc_set_property
and intel_update_fbc. FBC and flip related checks should be done only
for valid crtcs.

v6: Minor nits in FBC disable checks for comments in intel_crtc_set_property
and positioning the disable code in intel_update_fbc.

v7: In case rotation property on inactive crtc is updated, we return
successfully printing debug log as crtc is inactive and only property change
is preserved.

v8: update_plane is changed to update_primary_plane, crtc->fb is changed to
crtc->primary->fb  and return value of update_primary_plane is ignored.

v9: added rotation property to primary plane instead of crtc. Removing reset
of rotation property from lastclose. rotation_property is moved to
drm_mode_config, so drm layer will take care of resetting. Adding updation of
fbc when rotation is set to 0. Allowing rotation only if value is
different than old one.

Testcase: igt/kms_rotation_crc

Signed-off-by: Uma Shankar <uma.shan...@intel.com>
Signed-off-by: Sagar Kamble <sagar.a.kam...@intel.com>
Signed-off-by: Sonika Jindal <sonika.jin...@intel.com>

Some stuff I've noticed below.
-Daniel

---
  drivers/gpu/drm/i915/i915_reg.h      |    1 +
  drivers/gpu/drm/i915/intel_display.c |  104 ++++++++++++++++++++++++++++++++--
  drivers/gpu/drm/i915/intel_pm.c      |    6 ++
  3 files changed, 107 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 74283d5..f39e2e7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4107,6 +4107,7 @@ enum punit_power_well {
  #define   DISPPLANE_NO_LINE_DOUBLE            0
  #define   DISPPLANE_STEREO_POLARITY_FIRST     0
  #define   DISPPLANE_STEREO_POLARITY_SECOND    (1<<18)
+#define   DISPPLANE_ROTATE_180         (1<<15)
  #define   DISPPLANE_TRICKLE_FEED_DISABLE      (1<<14) /* Ironlake */
  #define   DISPPLANE_TILED                     (1<<10)
  #define _DSPAADDR                             0x70184
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 023c770..e881dcf 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2408,11 +2408,15 @@ static void i9xx_update_primary_plane(struct drm_crtc 
*crtc,
        unsigned long linear_offset;
        u32 dspcntr;
        u32 reg;
+       int pixel_size;
+
+       pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);

        reg = DSPCNTR(plane);
        dspcntr = I915_READ(reg);
        /* Mask out pixel format bits in case we change it */
        dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
+       dspcntr &= ~DISPPLANE_ROTATE_180;
        switch (fb->pixel_format) {
        case DRM_FORMAT_C8:
                dspcntr |= DISPPLANE_8BPP;
@@ -2454,8 +2458,6 @@ static void i9xx_update_primary_plane(struct drm_crtc 
*crtc,
        if (IS_G4X(dev))
                dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;

-       I915_WRITE(reg, dspcntr);
-
        linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);

        if (INTEL_INFO(dev)->gen >= 4) {
@@ -2467,6 +2469,17 @@ static void i9xx_update_primary_plane(struct drm_crtc 
*crtc,
        } else {
                intel_crtc->dspaddr_offset = linear_offset;
        }
+       if (to_intel_plane(crtc->primary)->rotation == BIT(DRM_ROTATE_180)) {
+               dspcntr |= DISPPLANE_ROTATE_180;
+
+               x += (intel_crtc->config.pipe_src_w - 1);
+               y += (intel_crtc->config.pipe_src_h - 1);
+               linear_offset += (intel_crtc->config.pipe_src_h - 1) *
+                       fb->pitches[0] +
+                       (intel_crtc->config.pipe_src_w - 1) * pixel_size;

We already have helper functions to compute the linear offset properly for
tiling, I think we should put the rotation adjustments in there to avoid
dpulicated code of this. And a comment about how this works would be nice.

Ok, I will add the comments.
+       }
+
+       I915_WRITE(reg, dspcntr);

        DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
                      i915_gem_obj_ggtt_offset(obj), linear_offset, x, y,
@@ -2494,11 +2507,14 @@ static void ironlake_update_primary_plane(struct 
drm_crtc *crtc,
        unsigned long linear_offset;
        u32 dspcntr;
        u32 reg;
+       int pixel_size;

+       pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
        reg = DSPCNTR(plane);
        dspcntr = I915_READ(reg);
        /* Mask out pixel format bits in case we change it */
        dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
+       dspcntr &= ~DISPPLANE_ROTATE_180;
        switch (fb->pixel_format) {
        case DRM_FORMAT_C8:
                dspcntr |= DISPPLANE_8BPP;
@@ -2536,14 +2552,26 @@ static void ironlake_update_primary_plane(struct 
drm_crtc *crtc,
        else
                dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;

-       I915_WRITE(reg, dspcntr);
-
        linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
        intel_crtc->dspaddr_offset =
                intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode,
                                               fb->bits_per_pixel / 8,
                                               fb->pitches[0]);
        linear_offset -= intel_crtc->dspaddr_offset;
+       if (to_intel_plane(crtc->primary)->rotation == BIT(DRM_ROTATE_180)) {
+               dspcntr |= DISPPLANE_ROTATE_180;
+
+               if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) {
+                       x += (intel_crtc->config.pipe_src_w - 1);
+                       y += (intel_crtc->config.pipe_src_h - 1);
+                       linear_offset +=
+                       (intel_crtc->config.pipe_src_h - 1) *
+                       fb->pitches[0] + (intel_crtc->config.pipe_src_w - 1) *
+                       pixel_size;
+               }
+       }
+
+       I915_WRITE(reg, dspcntr);

        DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
                      i915_gem_obj_ggtt_offset(obj), linear_offset, x, y,
@@ -11576,11 +11604,65 @@ static void intel_plane_destroy(struct drm_plane 
*plane)
        drm_plane_cleanup(plane);
        kfree(intel_plane);
  }
+static int intel_primary_plane_set_property(struct drm_plane *plane,
+                                   struct drm_property *prop,
+                                   uint64_t val)
+{
+       struct drm_device *dev = plane->dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_plane *intel_plane = to_intel_plane(plane);
+       struct drm_crtc *crtc = plane->crtc;
+       struct intel_crtc *intel_crtc;
+       uint64_t old_val;
+
+       if (prop == dev->mode_config.rotation_property) {
+               /* exactly one rotation angle please */
+               if (hweight32(val & 0xf) != 1)
+                       return -EINVAL;
+
+               old_val = intel_plane->rotation;
+               intel_plane->rotation = val;
+
+               if (old_val == intel_plane->rotation)
+                       return 0;
+
+               intel_crtc = to_intel_crtc(plane->crtc);
+
+               if (intel_crtc && intel_crtc->active &&

You need to check plane->crtc before upcasting.

Ok, I will add.
+                               intel_crtc->primary_enabled) {
+                       intel_crtc_wait_for_pending_flips(crtc);
+
+               /* FBC does not work on some platforms for rotated planes */
+                       if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) {
+                               if (dev_priv->fbc.plane == intel_crtc->plane &&
+                               intel_plane->rotation != BIT(DRM_ROTATE_0))
+                                       intel_disable_fbc(dev);
+                       /* If rotation was set earlier and new rotation is 0,
+                       we might have disabled fbc earlier. So update it now */
+                               else if (intel_plane->rotation == 
BIT(DRM_ROTATE_0)
+                                       && old_val != BIT(DRM_ROTATE_0)) {
+                                       mutex_lock(&dev->struct_mutex);
+                                       intel_update_fbc(dev);
+                                       mutex_unlock(&dev->struct_mutex);
+                               }
+                       }

Indentation is screwed up here. Also if we convert some of the checks into
early bails we could de-indent this by one level.

Ok, I will add
Also Chris mentioned that on some platforms this won't work and it's more
future-proof to just do a full modeset until we have the proper
infrastructure.

Can you please elaborate on this? What needs to be done?

+
+                       dev_priv->display.update_primary_plane(crtc,
+                               crtc->primary->fb, 0, 0);
+
+               } else {
+                       DRM_DEBUG_KMS("[CRTC:%d] inactive. Only rotation"
+                               "property is updated\n", crtc->base.id);
+               }
+       }
+       return 0;
+}

  static const struct drm_plane_funcs intel_primary_plane_funcs = {
        .update_plane = intel_primary_plane_setplane,
        .disable_plane = intel_primary_plane_disable,
        .destroy = intel_plane_destroy,
+       .set_property = intel_primary_plane_set_property
  };

  static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
@@ -11598,6 +11680,7 @@ static struct drm_plane 
*intel_primary_plane_create(struct drm_device *dev,
        primary->max_downscale = 1;
        primary->pipe = pipe;
        primary->plane = pipe;
+       primary->rotation = BIT(DRM_ROTATE_0);
        if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
                primary->plane = !pipe;

@@ -11613,6 +11696,19 @@ static struct drm_plane 
*intel_primary_plane_create(struct drm_device *dev,
                                 &intel_primary_plane_funcs,
                                 intel_primary_formats, num_formats,
                                 DRM_PLANE_TYPE_PRIMARY);
+
+       if (INTEL_INFO(dev)->gen >= 4) {
+               if (!dev->mode_config.rotation_property)
+                       dev->mode_config.rotation_property =
+                               drm_mode_create_rotation_property(dev,
+                                                       BIT(DRM_ROTATE_0) |
+                                                       BIT(DRM_ROTATE_180));

The property should be created in
drm_mode_create_standard_plane_properties.

Ok, I will add.

+               if (dev->mode_config.rotation_property)
+                       drm_object_attach_property(&primary->base.base,
+                               dev->mode_config.rotation_property,
+                               primary->rotation);
+       }
+
        return &primary->base;
  }

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9585f15..0210b1e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -578,6 +578,12 @@ void intel_update_fbc(struct drm_device *dev)
                        DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling 
compression\n");
                goto out_disable;
        }
+       if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
+           to_intel_plane(crtc->primary)->rotation != BIT(DRM_ROTATE_0)) {
+               if (set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED_MODE))
+                       DRM_DEBUG_KMS("Rotation unsupported, disabling\n");
+               goto out_disable;
+       }

        /* If the kernel debugger is active, always disable compression */
        if (in_dbg_master())
--
1.7.10.4

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