From: Ville Syrjälä <ville.syrj...@linux.intel.com>
WaFbcDisabledForOverlaySprite:ctg says we need to disallow fbc when
sprites are enabled.
We don't currently expose the sprites on g4x, but maybe we will later.
Add the appropriate check to fbc2_possible(). We will also need to
adjust the sprite code to turn off fbc prior to enabling the sprite,
but let's leave that until we actually get g4x sprite support.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index cdadf6e..b09d1a2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -523,6 +523,7 @@ static bool intel_fbc1_possible(struct intel_crtc *crtc)
static bool intel_fbc2_possible(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_framebuffer *fb = crtc->base.primary->fb;
struct drm_i915_gem_object *obj;
int max_width, max_height;
@@ -563,6 +564,14 @@ static bool intel_fbc2_possible(struct intel_crtc *crtc)
pipe_name(crtc->pipe),
plane_name(crtc->plane));
return false;
}
+
+ /* WaFbcDisabledForOverlaySprite:ctg */
+ /* FIXME need to figure this out nicer */
+ if (I915_READ(DVSCNTR(crtc->pipe)) & DVS_ENABLE) {
+ DRM_DEBUG("FBC pipe %c, plane %c: video sprite
enabled\n",
+ pipe_name(crtc->pipe),
plane_name(crtc->plane));
+ return false;
+ }
}
if (IS_GEN5(dev) && crtc->config.pch_pfit.enabled) {
--
1.8.5.5
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