On Fri, 2014-06-06 at 19:19 +0200, Daniel Vetter wrote: > On Thu, Jun 05, 2014 at 08:31:47PM +0300, Imre Deak wrote: > > Jesse noticed that the punit communication needed to query the VLV power > > well status can cause substantial delays. Since we can query the state > > frequently, for example during I2C transfers, maintain a cached version > > of the HW state to get rid of this delay. > > > > This fixes at least one reported regression where boot time increased by > > ~4 seconds due to frequent power well state queries on VLV during eDP > > EDID read. > > > > Reported-by: Jesse Barnes <jesse.bar...@intel.com> > > Signed-off-by: Imre Deak <imre.d...@intel.com> > > A citation for the regressing commit here (i.e. the one that enabled vlv > runtime pm) would be good so that Jani can pick it up.
I'm not aware of any other case where we had a significant overhead, so for the above particular issue I'd say this was introduced by commit bb4932c4f17b68f34645ffbcf845e4c29d17290b Author: Imre Deak <imre.d...@intel.com> Date: Mon Apr 14 20:24:33 2014 +0300 drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on > Aside: intel_rpm.c with the runtime pm infrastructure + some overview > kerneldoc would be really, really nice. You mean to move out the power well and rpm stuff to this new file? Agreed, intel_pm.c is rather big already. --Imre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx