On Wed, Jul 15, 2026 at 01:05:54PM +0200, Maarten Lankhorst wrote:
> Annotate the original area of the framebuffer as reserved in the GGTT
> before creating a new GGTT entry. This allows us to remove the
> range restrictions of GGTT in xe_bo_create_pin_map_at_novm().
> 
> Signed-off-by: Maarten Lankhorst <[email protected]>
> ---
>  drivers/gpu/drm/xe/display/xe_initial_plane.c | 27 +++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c 
> b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> index 0f86b73036d03..f49dda8e28255 100644
> --- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
> +++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> @@ -37,6 +37,25 @@ static bool need_pte_local(struct xe_device *xe)
>       return IS_DGFX(xe) || has_lmembar(xe);
>  }
>  
> +static struct xe_ggtt_node *reserve_original_node(struct xe_ggtt *ggtt, u32 
> base, u32 size, u64 page_size)
> +{
> +     u64 ggtt_start = xe_ggtt_start(ggtt), ggtt_end = ggtt_start + 
> xe_ggtt_size(ggtt);
> +
> +     /* Completely truncated? */
> +     if (base + size <= ggtt_start || base >= ggtt_end)
> +             return NULL;
> +
> +     /* Partially truncated? */
> +     if (base <= ggtt_start) {
> +             size -= ggtt_start - base;
> +             base = ggtt_start;
> +     } else if (base + size >= ggtt_end) {
> +             size = ggtt_end - base;
> +     }

This is exactly what I didn't want to have in the display code.
These are xe_ggtt.c implementation details that we shouldn't
have to know. So IMO either xe_ggtt_insert_node_at() should handle
all of it, or this reserve_original_node() wrapper should live in
xe_ggtt.c.

> +
> +     return xe_ggtt_insert_node_at(ggtt, size, page_size, base, base + size);
> +}
> +
>  static struct xe_bo *
>  initial_plane_bo(struct xe_device *xe,
>                struct intel_initial_plane_config *plane_config)
> @@ -46,6 +65,7 @@ initial_plane_bo(struct xe_device *xe,
>       resource_size_t phys_base;
>       u32 base, size, flags;
>       u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : 
> SZ_4K;
> +     struct xe_ggtt_node *original_ggtt_node;
>  
>       if (plane_config->size == 0)
>               return NULL;
> @@ -111,8 +131,15 @@ initial_plane_bo(struct xe_device *xe,
>               }
>       }
>  
> +     original_ggtt_node = reserve_original_node(tile0->mem.ggtt, base, size, 
> page_size);
> +     if (IS_ERR(original_ggtt_node))
> +             return NULL;
> +
>       bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base,
>                                         ttm_bo_type_kernel, flags, 0, false);
> +     if (original_ggtt_node)
> +             xe_ggtt_node_remove_noclear(original_ggtt_node);
> +
>       if (IS_ERR(bo)) {
>               drm_dbg_kms(&xe->drm,
>                           "Failed to create bo phys_base=%pa size %u with 
> flags %x: %li\n",
> -- 
> 2.53.0

-- 
Ville Syrjälä
Intel

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