Wa_16030862157:
Update Bandwidth Calculation to account for 16channel memory
config.

v2: Logical separation of changes (Suraj, Vinod)

WA: 16030862157, 16030875223
Bspec: 69131, 68859
Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index 41539fdfeac5..aaa0350dca78 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -14,6 +14,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dram.h"
 #include "intel_mchbar.h"
 #include "intel_parent.h"
@@ -272,7 +273,14 @@ static int icl_get_qgv_points(struct intel_display 
*display,
                case INTEL_DRAM_LPDDR4:
                case INTEL_DRAM_LPDDR5:
                        qi->t_bl = 16;
-                       qi->max_numchannels = 8;
+                       /*
+                        * Wa_16030862157
+                        * Xe3p supports a fully-populated 16-channel LPDDR
+                        * config (4 memory controllers x 4 channels); earlier
+                        * D14+ platforms top out at 8.
+                        */
+                       qi->max_numchannels =
+                               intel_display_wa(display, 
INTEL_DISPLAY_WA_16030862157) ? 16 : 8;
                        qi->channel_width = 16;
                        qi->deinterleave = 4;
                        break;
@@ -624,10 +632,16 @@ static int tgl_get_bw_info(struct intel_display *display,
 
        ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids / 
num_channels);
        /*
+        * Wa_16030862157
         * clperchgroup = 4kpagespermempage * clperchperblock,
-        * clperchperblock = 8 / num_channels * interleave
+        * clperchperblock = max(8 / num_channels, 1) * interleave
+        *
+        * The 8 / num_channels truncating divide collapses to 0 for
+        * >8-channel configs (16-channel: 8 / 16 = 0); the max(..., 1) floor
+        * keeps clperchperblock >= 1 there while preserving the literal
+        * truncating divide for <=8-channel configs.
         */
-       clperchgroup = 4 * (8 / num_channels) * qi.deinterleave;
+       clperchgroup = 4 * max(8 / num_channels, 1) * qi.deinterleave;
 
        display->bw.num_qgv_points = qi.num_qgv_points;
        display->bw.num_psf_gv_points = qi.num_psf_points;
-- 
2.50.1

Reply via email to