To increase debuggability add lane count as part of HW state dump.
Signed-off-by: Mika Kahola <[email protected]>
Reviewed-by: Suraj Kandpal <[email protected]>
---
drivers/gpu/drm/i915/display/intel_lt_phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c
b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index dfcff3d6ad33..62719082efda 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -2170,8 +2170,8 @@ void intel_lt_phy_dump_hw_state(struct drm_printer *p,
{
int i, j;
- drm_printf(p, "lt_phy_pll_hw_state: ssc enabled: %d, tbt mode: %d\n",
- hw_state->ssc_enabled, hw_state->tbt_mode);
+ drm_printf(p, "lt_phy_pll_hw_state: lane count: %d, ssc enabled: %d,
tbt mode: %d\n",
+ hw_state->lane_count, hw_state->ssc_enabled,
hw_state->tbt_mode);
for (i = 0; i < 3; i++) {
drm_printf(p, "config[%d] = 0x%.4x,\n",
--
2.43.0
