On Fri, Apr 25, 2014 at 7:14 PM, <ville.syrj...@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrj...@linux.intel.com> > > Document the internal structure of the VLV display PHY a bit to help > people understand how the different register blocks relate to each > other. > > v2: Add a bit more text > Make it a DOC: comment, but leave the ascii art out since > it would get mangled > > Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Chon can you please review these documentation patches from Ville quickly? You've done all the chv phy enabling after all. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
