> -----Original Message-----
> From: Kandpal, Suraj <[email protected]>
> Sent: Thursday, 19 February 2026 4.44
> To: Kahola, Mika <[email protected]>; [email protected]; 
> [email protected]
> Cc: Kahola, Mika <[email protected]>
> Subject: RE: [PATCH 01/19] drm/i915/lt_phy: Dump missing PLL state parameters
> 
> > Subject: [PATCH 01/19] drm/i915/lt_phy: Dump missing PLL state
> > parameters
> >
> > Dump missing PLL structure members ssc_enabled, ttbt_mode, addr_msb
> > and
> 
> * tbt
> 
> > addr_lsb to enhance debugging. Readout addr_msb and addr_lsb from HW
> > for HW/SW state comparison.
> >
> > Signed-off-by: Mika Kahola <[email protected]>
> > ---
> >  drivers/gpu/drm/i915/display/intel_lt_phy.c | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> > b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> > index 27ad8407606b..9647afcea897 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> > @@ -2142,7 +2142,13 @@ void intel_lt_phy_dump_hw_state(struct
> > intel_display *display,  {
> >     int i, j;
> >
> > -   drm_dbg_kms(display->drm, "lt_phy_pll_hw_state:\n");
> > +   drm_dbg_kms(display->drm, "lt_phy_pll_hw_state: ssc enabled: %d,
> > tbt mode: %d\n",
> > +               hw_state->ssc_enabled, hw_state->tbt_mode);
> > +
> > +   for (i = 0; i <= 12; i++)
> > +           drm_dbg_kms(display->drm, "addr [%d] msb = 0x%.4x, lsb =
> > 0x%.4x\n",
> > +                       i, hw_state->addr_msb[i], hw_state->addr_lsb[i]);
> > +
> 
> No need to create a new loop here to print address print it like you read it 
> there should be a nested loop After config print there
> should be a nested loop let's use that.
> Moreover it will be better because we will showing on which address we write 
> what data.

This was addition for figuring out why pll state verification has mismatches. 
Based on CI results there still are which I missed while testing locally. I 
missed to set pll_state to zero on readout phase. Anyway, I will move these and 
use nested loop instead.

Thanks!
Mika

> 
> Regards,
> Suraj Kandpal
> 
> >     for (i = 0; i < 3; i++) {
> >             drm_dbg_kms(display->drm, "config[%d] = 0x%.4x,\n",
> >                         i, hw_state->config[i]);
> > @@ -2197,6 +2203,9 @@ void intel_lt_phy_pll_readout_hw_state(struct
> > intel_encoder *encoder,
> >     pll_state->config[2] = intel_lt_phy_read(encoder, lane,
> > LT_PHY_VDR_2_CONFIG);
> >
> >     for (i = 0; i <= 12; i++) {
> > +           pll_state->addr_msb[i] = intel_lt_phy_read(encoder,
> > INTEL_LT_PHY_LANE0, LT_PHY_VDR_X_ADDR_MSB(i));
> > +           pll_state->addr_lsb[i] = intel_lt_phy_read(encoder,
> > +INTEL_LT_PHY_LANE0, LT_PHY_VDR_X_ADDR_LSB(i));
> > +
> >             for (j = 3, k = 0; j >= 0; j--, k++)
> >                     pll_state->data[i][k] =
> >                             intel_lt_phy_read(encoder,
> > INTEL_LT_PHY_LANE0,
> > --
> > 2.43.0

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