> Subject: [PATCH 11/19] drm/i915/lt_phy: Add xe3plpd .get_hw_state hook > > Add .get_hw_state hook to xe3plpd platform for dpll framework and update > intel_lt_phy_pll_readout_hw_state() function accordingly to support dpll > framework. > > Signed-off-by: Mika Kahola <[email protected]>
LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 +++++++++++++ > drivers/gpu/drm/i915/display/intel_lt_phy.c | 11 ++++++----- > drivers/gpu/drm/i915/display/intel_lt_phy.h | 3 +-- > 4 files changed, 21 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index f92323664162..57de15fe3446 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4249,7 +4249,7 @@ static void xe3plpd_ddi_get_config(struct > intel_encoder *encoder, { > struct intel_display *display = to_intel_display(encoder); > > - intel_lt_phy_pll_readout_hw_state(encoder, crtc_state, &crtc_state- > >dpll_hw_state.ltpll); > + intel_lt_phy_pll_readout_hw_state(encoder, > +&crtc_state->dpll_hw_state.ltpll); > > if (crtc_state->dpll_hw_state.ltpll.tbt_mode) > crtc_state->port_clock = > intel_mtl_tbt_calc_port_clock(encoder); > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index c1d7d9909544..6502916793f5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -4571,7 +4571,20 @@ static const struct intel_dpll_mgr mtl_pll_mgr = { > .compare_hw_state = mtl_compare_hw_state, }; > > +static bool xe3plpd_pll_get_hw_state(struct intel_display *display, > + struct intel_dpll *pll, > + struct intel_dpll_hw_state *dpll_hw_state) > { > + struct intel_encoder *encoder = get_intel_encoder(display, pll); > + > + if (!encoder) > + return false; > + > + return intel_lt_phy_pll_readout_hw_state(encoder, > +&dpll_hw_state->ltpll); } > + > static const struct intel_dpll_funcs xe3plpd_pll_funcs = { > + .get_hw_state = xe3plpd_pll_get_hw_state, > }; > > static const struct dpll_info xe3plpd_plls[] = { diff --git > a/drivers/gpu/drm/i915/display/intel_lt_phy.c > b/drivers/gpu/drm/i915/display/intel_lt_phy.c > index 2d6cbfa79b5c..b1d95eb897db 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c > @@ -2205,8 +2205,7 @@ static bool intel_lt_phy_pll_is_enabled(struct > intel_encoder *encoder) > intel_lt_phy_get_pclk_pll_request(lane); > } > > -void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, > - const struct intel_crtc_state > *crtc_state, > +bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, > struct intel_lt_phy_pll_state > *pll_state) { > u8 owned_lane_mask; > @@ -2215,11 +2214,11 @@ void intel_lt_phy_pll_readout_hw_state(struct > intel_encoder *encoder, > int i, j, k; > > if (!intel_lt_phy_pll_is_enabled(encoder)) > - return; > + return false; > > pll_state->tbt_mode = > intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)); > if (pll_state->tbt_mode) > - return; > + return false; > > owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder); > lane = owned_lane_mask & INTEL_LT_PHY_LANE0 ? : > INTEL_LT_PHY_LANE1; @@ -2240,6 +2239,8 @@ void > intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, > } > > intel_lt_phy_transaction_end(encoder, wakeref); > + > + return true; > } > > void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, @@ - > 2265,7 +2266,7 @@ void intel_lt_phy_pll_state_verify(struct > intel_atomic_state *state, > return; > > encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > - intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, > &pll_hw_state); > + intel_lt_phy_pll_readout_hw_state(encoder, &pll_hw_state); > > dig_port = enc_to_dig_port(encoder); > if (intel_tc_port_in_tbt_alt_mode(dig_port)) > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h > b/drivers/gpu/drm/i915/display/intel_lt_phy.h > index 597b671bd39d..ff3896a2cebe 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h > @@ -33,8 +33,7 @@ void intel_lt_phy_dump_hw_state(struct drm_printer > *p, bool intel_lt_phy_pll_compare_hw_state(const struct > intel_lt_phy_pll_state *a, > const struct intel_lt_phy_pll_state *b); -void > intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, > - const struct intel_crtc_state > *crtc_state, > +bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, > struct intel_lt_phy_pll_state > *pll_state); > void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, > struct intel_crtc *crtc); > -- > 2.43.0
