On Thu, Sep 18, 2025 at 11:40:51AM +0300, Jani Nikula wrote: > For reasons unknown, xe uses XE_PAGE_SIZE alignment for > stride. Presumably it's just a confusion between stride alignment and bo > allocation size alignment. Switch to 64 byte alignment to, uh, align > with i915. > > This will also be helpful in deduplicating and unifying the xe and i915 > framebuffer allocation. > > Link: https://lore.kernel.org/r/alqsc87ol_zcx...@intel.com > Suggested-by: Ville Syrjälä <ville.syrj...@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com> > --- > drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c > b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c > index 8ea9a472113c..bce4cb16f682 100644 > --- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c > +++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c > @@ -33,7 +33,7 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct > drm_fb_helper *helper, > mode_cmd.height = sizes->surface_height; > > mode_cmd.pitches[0] = ALIGN(mode_cmd.width * > - DIV_ROUND_UP(sizes->surface_bpp, 8), > XE_PAGE_SIZE); > + DIV_ROUND_UP(sizes->surface_bpp, 8), 64); > mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, > sizes->surface_depth); > > -- > 2.47.3 -- Ville Syrjälä Intel
