On Mon, 08 Sep 2025, Ville Syrjälä <ville.syrj...@linux.intel.com> wrote:
> It's aligning stride, not the size. So doesn't make sense. The only
> time you need page alignment for stride is for remapping, which is
> handled correctly by i915 in the dumb bo codepath and not handled at all
> by xe as usual.
>
> I suspect what we really should do for the fbdev allocation is to use
> the dump bo code, and make sure that code works the same way for i915
> and xe.
So what does it mean in practise and who's going to do this?
I'm trying to a) clarify what's i915/xe specific, b) minimize those
parts by pulling in common code to display, and c) finally making the
remaining i915/xe core specific parts independent of display. I'm trying
to make incremental forward progress.
But I just can't sign up for fixing up absolutely everything. Some of it
is technical debt going all the way back to 44e694958b95
("drm/xe/display: Implement display support"). I think many of the
interfaces between i915 and xe around bo's are way too high level, but
there's clear "impedance mismatch" between a lot of i915 and xe specific
things, and they just don't map 1:1 nicely.
BR,
Jani.
--
Jani Nikula, Intel
