On 9/12/2025 7:33 PM, Ville Syrjälä wrote:
On Thu, Sep 11, 2025 at 08:15:39AM +0530, Ankit Nautiyal wrote:
Instead of setting vrr.guardband to vblank, use optimal guardband that
works for most of the cases. This will help in avoiding need of change
in guardband and fix the LRR feature that needs seamless switching to
a lower refresh rate.
I think the _only_ thing we need for that is intel_crtc_vblank_delay()
to return a different number. But this series is doing all kinds of
stuff to other VRR logic that I don't understand at all.
There are couple of things which are done apart from
intel_crtc_vblank_delay:
1. The delay calculation based on the pipe fill latencies as given in Bspec.
There were some checks which were already there, I have moved them into
different place and added new checks.
There are still some things like PKG_C_LATENCY which might need a relook.
2. The SCL value is shortened as we see some issue with the
dsb_wait_for_usec just after the push if its in the SCL window.
I am still looking into this one to root cause, but somewhere seems to
be related to DSB_CHICKEN_BIT 15 wait for safe window.
I agree with the changes you have suggested in other patches, and will
send new version with those addressed.
Will get rid of other changes that are not required now.
First few patches fix/refactor and extract common functions required for
dsc/scaler prefill time computation. Later patches use these helpers to
compute an optimized guardband.
Also, for seamless_mn where vtotal is same but mode clock is changed to
seamlessly switch to lower rate, re-compute the vrr timings.
As Art pointed out that stuff is defeatured on LNL+ (just sent
a patch for that) so we don't need to worry about it too much.
Thanks for the patch, looks good to me.
I will drop the patches related to this.
Thanks again for looking into the series and to provide suggestions and
corrections.
Regards,
Ankit
Few things that still need work:
-The timestamps corresponding with next start of vactive still need to be
fixed with the new scheme.
-Re-enabling CMRR
Rev2:
-Address comments from Mitul.
-Extract helpers for dsc/scaler prefill latencies.
-Fix downscaling factor for chroma subsampling.
-Use missing pkg C max latency.
-Fix guardband computation for seamless mn, always use vblank for
higher resolution.
Rev3:
-Drop patches for computing and storing PSR/Panel Replay wake times
latencies and use existing helpers to compute these in intel_alpm.c.
-Drop patch to change the Vmin as it was not required.
Rev4:
-Rebase
-Drop patch for checking bounds for scaler array access.
-Use a new flag for setting vrr timings for seamless drrs.
Rev5:
-Address comments from Mitul, Jani:
-Refactor few helpers for computing latencies.
-Rename the helper to check the guardband to intel_crtc_guardband_atomic_check()
-Refactor the helper intel_panel_highest_mode().
Rev6:
-Rebase
-Address review comments from Mitul.
-Improve documentation for and other minor fixes in Patch#12
Rev7:
-Address comments from Jani.
-Move the latency helpers from intel_display.c to intel_vrr.c and rename
the helpers appropriately.
-Drop redundant check for HAS_VRR with intel_vrr_possible().
Rev8:
-Fix CI issues.
-For fixed RR wait for delayed vblank before dsb interrupt.
Rev9:
-Fix vrr.vsync_start/end timings for 3D modes (patch#1)
-Rewrite the patch to wait for delayed vblank before dsb interrupt
(patch #11)
-Fix the flipline and vmin timings with optimized guardband (patch#12)
Rev10:
-Address comments from Ville: Use min guardband computation for setting
the vblank delay and set the crtc_vblank_start to delayed vblank.
(Patch#13)
-Modify the TRANS_SET_CONTEXT_LATENCY as per new guardband and use
vrr.guardband to readback vblank_start. (Patch#11)
-From previous revision:
->Drop patch#11 "drm/i915/dsb: Align flipdone with delayed vblank using
guardband wait", as this is no longer required.
->Modify Patch#12 "drm/i915/vrr: Use static guardband to support seamless
LRR switching" to only introduce a helper to compute the fix guardband.
Modify the commit message and the subject.
Ankit Nautiyal (15):
drm/i915/vrr: Use crtc_vsync_start/end for computing
vrr.vsync_start/end
drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling
drm/i915/skl_watermark: Pass linetime as argument to latency helpers
drm/i915/skl_scaler: Introduce helper for chroma downscale factor
drm/i915/display: Extract helpers to set dsc/scaler prefill latencies
drm/i915/dp: Add SDP latency computation helper
drm/i915/alpm: Add function to compute max link-wake latency
drm/i915/vrr: Use vrr.sync_start for getting vtotal
drm/i915/display: Add guardband check for feature latencies
drm/i915/skl_watermark: Remove redundant latency checks from vblank
validation
drm/i915/display: Use vrr.guardband to derive vblank_start
drm/i915/vrr: Introduce helper to compute min static guardband
drm/i915/display: Use optimized guardband to set vblank start
drm/i915/panel: Refactor helper to get highest fixed mode
drm/i915/vrr: Fix seamless_mn drrs for PTL
drivers/gpu/drm/i915/display/intel_alpm.c | 15 +
drivers/gpu/drm/i915/display/intel_alpm.h | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 236 ++++++++++++++-
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 63 +++-
drivers/gpu/drm/i915/display/intel_dp.h | 3 +
drivers/gpu/drm/i915/display/intel_panel.c | 11 +-
drivers/gpu/drm/i915/display/intel_panel.h | 3 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 272 ++++++++++++++++--
drivers/gpu/drm/i915/display/intel_vrr.h | 10 +
drivers/gpu/drm/i915/display/skl_scaler.c | 5 +
drivers/gpu/drm/i915/display/skl_scaler.h | 3 +
drivers/gpu/drm/i915/display/skl_watermark.c | 89 +-----
drivers/gpu/drm/i915/display/skl_watermark.h | 1 +
14 files changed, 586 insertions(+), 129 deletions(-)
--
2.45.2
